K. Huang

发表

Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain

Mark Mohammad Tehranipoor, Ujjwal Guin, Yiorgos Makris, 2014, Proceedings of the IEEE.

Gaussian Process-Based Wafer-Level Correlation Modeling and Its Applications

Yiorgos Makris, Nathan Kupp, Constantinos Xanthopoulos, 2019, Machine Learning in VLSI Computer-Aided Design.

Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation

Yiorgos Makris, Ke Huang, Ali Ahmadi, 2014, 2014 International Test Conference.

Real-Time IC Aging Prediction via On-Chip Sensors

Ke Huang, Naghmeh Karimi, Md Toufiq Hasan Anik, 2021, 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations

Yiorgos Makris, Ke Huang, Ali Ahmadi, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Process monitoring through wafer-level spatial variation decomposition

Yiorgos Makris, Ke Huang, Nathan Kupp, 2013, 2013 IEEE International Test Conference (ITC).

Spatial correlation modeling for probe test cost reduction in RF devices

Yiorgos Makris, Ke Huang, Nathan Kupp, 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Diagnosis of Local Spot Defects in Analog Circuits

Camelia Hora, Salvador Mir, Ke Huang, 2012, IEEE Transactions on Instrumentation and Measurement.

Fault diagnosis of analog circuits based on machine learning

Salvador Mir, Ke Huang, Haralampos-G. D. Stratigopoulos, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

On-chip implementation of ECoG signal data decoding in brain-computer interface

Ke Huang, Mradul Agrawal, Sandeep Vidyashankar, 2016, 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW).

Real-Time Prediction for IC Aging Based on Machine Learning

Ke Huang, Naghmeh Karimi, Xinqiao Zhang, 2019, IEEE Transactions on Instrumentation and Measurement.

Hardware Trojan detection through golden chip-free statistical side-channel fingerprinting

Yu Liu, Yiorgos Makris, Ke Huang, 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

Handling discontinuous effects in modeling spatial correlation of wafer-level analog/RF tests

Yiorgos Makris, Ke Huang, Nathan Kupp, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Spatial estimation of wafer measurement parameters using Gaussian process models

Yiorgos Makris, Ke Huang, Nathan Kupp, 2012, 2012 IEEE International Test Conference.

Parametric counterfeit IC detection via Support Vector Machines

Yiorgos Makris, Ke Huang, John M. Carulli, 2012, 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Reconciling the IC test and security dichotomy

Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu, 2013, 2013 18th IEEE European Test Symposium (ETS).

Prognosis of NBTI aging using a machine learning scheme

Ke Huang, Naghmeh Karimi, K. Huang, 2016, 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Dynamic Analog/RF Alternate Test Strategies Based on On-chip Learning

Ke Huang, Parth Kansara, Louay Abdallah, 2018, J. Electron. Test..

Ecological Driving System for Connected/Automated Vehicles Using a Two-Stage Control Hierarchy

Yang Lu, Ke Huang, Chunting Chris Mi, 2018, IEEE Transactions on Intelligent Transportation Systems.

IC laser trimming speed-up through wafer-level spatial correlation modeling

Yiorgos Makris, Ke Huang, Constantinos Xanthopoulos, 2014, 2014 International Test Conference.

Recycled IC Detection Based on Statistical Methods

Yu Liu, Yiorgos Makris, Ke Huang, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Yield prognosis for fab-to-fab product migration

Yiorgos Makris, Ke Huang, Ali Ahmadi, 2015, 2015 IEEE 33rd VLSI Test Symposium (VTS).

Bayesian Fault Diagnosis of RF Circuits Using Nonparametric Density Estimation

Salvador Mir, Ke Huang, Haralampos-G. D. Stratigopoulos, 2010, 2010 19th IEEE Asian Test Symposium.

Low-Cost Analog/RF IC Testing Through Combined Intra- and Inter-Die Correlation Models

Yiorgos Makris, Ke Huang, Nathan Kupp, 2015, IEEE Design & Test.

On combining alternate test with spatial correlation modeling in analog/RF ICs

Yiorgos Makris, Ke Huang, Nathan Kupp, 2013, 2013 18th IEEE European Test Symposium (ETS).

Multivariate statistical techniques for analog parametric test metrics estimation

Salvador Mir, Ke Huang, Ahcène Bounceur, 2013, 2013 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

Accurate estimation of analog test metrics with extreme circuits

Salvador Mir, Ke Huang, Ahcène Bounceur, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).