N. Mazzeo

A Room Temperature 0.1 /spl mu/m CMOS on SOI

J. Warnock, S. Furkay, D. Moy, 1993, Symposium 1993 on VLSI Technology.

A two-level metal fully planarized interconnect structure implemented on a 64 kb CMOS SRAM

C. Hu, D. Moy, D. Pearson, 1989, Proceedings., Sixth International IEEE VLSI Multilevel Interconnection Conference.

Influence of NiFe quality on bubble devices

M. Kryder, N. Mazzeo, T. Collins, 1979 .

Magnetic properties and domain structures in narrow NiFe stripes

M. Kryder, N. Mazzeo, S. Schwarzl, 1980 .

Laser writing on silicon‐metal bilayers for optical storage. II. Microscopic study

N. Mazzeo, K. Tu, K. Ahn, 1982 .

Laser writing on metal‐silicon bilayers for optical storage. I. Optical properties

King-Ning Tu, Kie Y. Ahn, N. Mazzeo, 1982 .

High‐sensitivity silicide films for optical recording

N. Mazzeo, K. Tu, T. Distefano, 1982 .

Dry etching of TiN/Al(Cu)/Si for very large scale integrated local interconnections

N. Mazzeo, M. Small, C. Hu, 1990 .

Electromigration Damage in Fine Al Alloy Lines due To Interfacial Diffusion

P. Ho, N. Mazzeo, M. Small, 1993 .