K. Ohshima

A 45nm High Performance Bulk Logic Platform Technology (CMOS6) using Ultra High NA(1.07) Immersion Lithography with Hybrid Dual-Damascene Structure and Porous Low-k BEOL

S. Takahashi, S. Yamada, S. Muramatsu, 2006, 2006 International Electron Devices Meeting.

Systems with 432MS/s PRML Read Channel and 16Mb Embedded DRAM

Akira Matsuzawa, Toshihiko Takahashi, Takahiro Ochi, 2001 .