H. Yin

发表

Stress dependence and poly-pitch scaling characteristics of (110) PMOS drive current

S. Narasimha, A. Waite, J. Johnson, 2007, 2007 IEEE Symposium on VLSI Technology.

High performance 32nm SOI CMOS with high-k/metal gate and 0.149µm2 SRAM and ultra low-k back end with eleven levels of copper

M. Belyansky, L. Black, J. Holt, 2006, 2009 Symposium on VLSI Technology.

Performance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI)

C. Ouyang, D. Mocuta, P. O'Neil, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Doping profile optimisation in bulk FinFET channel and source/drain extension regions for low off–state leakage

Tianchun Ye, H. Yin, Huilong Zhu, 2015 .

Vertical Sandwich Gate-All-Around Field-Effect Transistors With Self-Aligned High-k Metal Gates and Small Effective-Gate-Length Variation

Huilong Zhu, Yongkui Zhang, Xiaogen Yin, 2020, IEEE Electron Device Letters.

Integration Issue of Tensile SiN Liner for Dual Stress Liner(DSL) in Gate-Last High-k/Metal Gate(HKMG) Process Flow

Qiang Xu, Tao Yang, Peizhen Hong, 2013 .

Optimization of SiGe selective epitaxy for source/drain engineering in 22 nm node complementary metal-oxide semiconductor (CMOS)

Chao Zhao, Jiang Yan, Changliang Qin, 2013 .

Mobility Enhancement Technology for Scaling of CMOS Devices: Overview and Status

Jun Luo, Jiang Yan, Huajie Zhou, 2011 .

An examination of facet formation during solid phase epitaxy of line-shaped amorphized regions in (001) and (011) Si

J. Ott, H. Yin, D. Sadana, 2007 .

A study of trench-edge defect formation in (001) and (011) silicon recrystallized by solid phase epitaxy

C. Sung, J. Ott, H. Yin, 2007 .

High performance cmos bulk technology using direct silicon bond (dsb) mixed crystal orientation substrates

Chun-Yung Sung, Zhijiong Luo, Haizhou Yin, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Uniaxial strain relaxation on ultra-thin strained-Si directly on insulator (SSDOI) substrates

C. Sung, M. Khare, M. Ieong, 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

Amorphization/templated recrystallization method for changing the orientation of single-crystal silicon: An alternative approach to hybrid orientation substrates

Keith E. Fogel, Chun-Yung Sung, John A. Ott, 2005 .

Vertical Sandwich GAA FETs With Self-Aligned High-k Metal Gate Made by Quasi Atomic Layer Etching Process

A. Du, H. Yin, Huilong Zhu, 2021, IEEE Transactions on Electron Devices.

Planar Bulk MOSFETs With Self-Aligned Pocket Well to Improve Short-Channel Effects and Enhance Device Performance

Tianchun Ye, Q. Liang, Hongyu Yu, 2015, IEEE Transactions on Electron Devices.