K. Maeguchi

A 10 ns 54*54 b parallel structured full array multiplier with 0.5 mu m CMOS technology

M. Nagamatsu, Y. Toyoshima, J. Mori, 1991 .

Radiation-Induced Interface States of Poly-Si Gate MOS Capacitors Using Low Temperature Gate Oxidation

H. Tango, K. Naruke, H. Tango, 1983, IEEE Transactions on Nuclear Science.