Bertrand Le Gal

发表

From multicore LDPC decoder implementations to FPGA decoder architectures: a case study

Yann Delomier, Bertrand Le Gal, Jérémie Crenne, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Experiments on designing low power decimation filter for multistandard receiver on heterogeneous targets

Bertrand Le Gal, Nadia Khouja, Khaled Grati, 2009, 2009 17th European Signal Processing Conference.

Lowering the Error Floor of Turbo Codes With CRC Verification

Bertrand Le Gal, Christophe Jégo, Thibaud Tonnellier, 2016, IEEE Wireless Communications Letters.

A scalable 3-phase polar decoder

Bertrand Le Gal, Christophe Jégo, Camille Leroux, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

A generic video adaptation FPGA implementation towards content- and context-awareness in future networks

Bertrand Le Gal, Dominique Dallet, Daniel Négru, 2012, Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing.

Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices

Yann Delomier, Bertrand Le Gal, Jeremie Crenne, 2020, J. Signal Process. Syst..

Méthodologie d'optimisation des processeurs embarqués. Une approche favorisant la réduction de la surface et de la consommation des processeurs embarqués

Bertrand Le Gal, Christophe Jégo, 2013, Tech. Sci. Informatiques.

HLS design flow for the synthesis of multimode systems under multiple constraints

Bertrand Le Gal, Lilian Bossuet, Emmanuel Casseau, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

Multicore and Manycore Implementations of ADMM-based Decoders for LDPC Decoding

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2018, J. Signal Process. Syst..

Design space exploration for partially reconfigurable architectures in real-time systems

Bertrand Le Gal, Daniel Negru, Fabrice Muller, 2013, J. Syst. Archit..

Pipelined memory controllers for DSP real-time applications handling unpredictable data accesses

Bertrand Le Gal, Emmanuel Casseau, Eric Martin, 2005, 2005 13th European Signal Processing Conference.

Fast Simulation and Prototyping with AFF3CT

Bertrand Le Gal, Thibaud Tonnellier, Camille Leroux, 2017 .

An LP-based algorithm for decoding terminated LDPC convolutional codes

Bertrand Le Gal, Nadia Khouja, Fethi Tlili, 2017, 2017 International Conference on Internet of Things, Embedded Systems and Communications (IINTEC).

High-Throughput FFT-SPA Decoder Implementation for Non-Binary LDPC Codes on x86 Multicore Processors

Bertrand Le Gal, Christophe Jego, C. Jégo, 2020, J. Signal Process. Syst..

Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis

Yann Delomier, Bertrand Le Gal, Jérémie Crenne, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

A generic video adaptation framework towards content-and context-awareness in future networks

Bertrand Le Gal, Dominique Dallet, Daniel Négru, 2012, 2012 Proceedings of the 20th European Signal Processing Conference (EUSIPCO).

A Flexible NISC-Based LDPC Decoder

Bertrand Le Gal, Christophe Jégo, Camille Leroux, 2014, IEEE Transactions on Signal Processing.

Design of multi-mode application-specific cores based on high-level synthesis

Bertrand Le Gal, Emmanuel Casseau, E. Casseau, 2012, Integr..

Assertion support in high-level synthesis design flow

Bertrand Le Gal, Christophe Jégo, Dominique Dallet, 2011, FDL 2011 Proceedings.

Improving the performance of message parsers for embedded systems

Yérom-David Bromberg, Bertrand Le Gal, Tegawendé F. Bissyandé, 2013, SAC '13.

Zebra: Building Efficient Network Message Parsers for Embedded Systems

Yérom-David Bromberg, Bertrand Le Gal, Tegawendé F. Bissyandé, 2012, IEEE Embedded Systems Letters.

Orthogonal correction implementation for time interleaved analog-to-digital converters: Realtime application

Bertrand Le Gal, Lilian Bossuet, Dominique Dallet, 2008, 2008 16th European Signal Processing Conference.

High-performance software implementations of SCAN decoder for polar codes

Bertrand Le Gal, Christophe Jégo, Camille Leroux, 2018, Ann. des Télécommunications.

FPGA based system for automatic cDNA microarray image processing

Bertrand Le Gal, Romulus Terebes, Monica Borda, 2012, Comput. Medical Imaging Graph..

Low-latency and high-throughput software turbo decoders on multi-core architectures

Bertrand Le Gal, Christophe Jégo, 2020, Ann. des Télécommunications.

Memory reduction techniques for successive cancellation decoding of polar codes

Bertrand Le Gal, Christophe Jégo, Camille Leroux, 2016, 2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Improving architecture efficiency of SoftCore processors

Bertrand Le Gal, Christophe Jego, 2012 .

Beyond Gbps Turbo decoder on multi-core CPUs

Bertrand Le Gal, Thibaud Tonnellier, Camille Leroux, 2016, 2016 9th International Symposium on Turbo Codes and Iterative Information Processing (ISTC).

Evaluation of the hardware complexity of the ADMM approach for LDPC decoding

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2016, 2016 IEEE Wireless Communications and Networking Conference.

ADMM hardware decoder for regular LDPC codes using a NISC-based architecture

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2018, 2018 IEEE Wireless Communications and Networking Conference (WCNC).

Hardware design of Euclidean Projection modules for ADMM LDPC decoding

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

High data rate and flexible hardware QC-LDPC decoder for satellite optical communications

Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, 2018, 2018 IEEE 10th International Symposium on Turbo Codes & Iterative Information Processing (ISTC).

FPGA technology and parallel computing towards automatic microarray image processing

Bertrand Le Gal, Monica Borda, Bogdan Belean, 2011, 2011 34th International Conference on Telecommunications and Signal Processing (TSP).

High-level synthesis for the design of FPGA-based signal processing systems

Bertrand Le Gal, Emmanuel Casseau, E. Casseau, 2009, 2009 International Symposium on Systems, Architectures, Modeling, and Simulation.

Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis

Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Word-Length Aware DSP Hardware Design Flow Based on High-Level Synthesis

Bertrand Le Gal, Emmanuel Casseau, E. Casseau, 2011, J. Signal Process. Syst..

Real Time LP Decoding of LDPC Codes for High Correction Performance Applications

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2016, IEEE Wireless Communications Letters.

Low complexity ADMM-LP based decoding strategy for LDPC convolutional codes

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2017, 2017 25th International Conference on Software, Telecommunications and Computer Networks (SoftCOM).

Reducing and smoothing power consumption of ROM-based controller implementations

Bertrand Le Gal, Lilian Bossuet, Dominique Dallet, 2010, SBCCI '10.

A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2017, 2017 IEEE Symposium on Computers and Communications (ISCC).

A Very High Throughput Deblocking Filter for H.264/AVC

Ahmed Ben Atitallah, Patrice Kadionik, Bertrand Le Gal, 2013, J. Signal Process. Syst..

Multicore implementation of LDPC decoders based on ADMM algorithm

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2016, 2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Area optimization of ROM-based controllers dedicated to digital signal processing applications

Bertrand Le Gal, Lilian Bossuet, Dominique Dallet, 2010, 2010 18th European Signal Processing Conference.

A system aproach for reducing power consumption of multimedia devices with a low QoE impact

Bertrand Le Gal, Dominique Dallet, Daniel Négru, 2011, 2011 18th IEEE International Conference on Electronics, Circuits, and Systems.

Study and analysis of a new implementation of a mixed-signal cartesian feedback for a low power zero-IF WCDMA transmitter

Eric Kerherve, Bertrand Le Gal, Didier Belot, 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

Energy consumption analysis of software polar decoders on low power processors

Bertrand Le Gal, Camille Leroux, Denis Barthou, 2016, 2016 24th European Signal Processing Conference (EUSIPCO).

Software polar decoder on an embedded processor

Bertrand Le Gal, Christophe Jégo, Camille Leroux, 2014, 2014 IEEE Workshop on Signal Processing Systems (SiPS).

Successive cancellation decoder for very long polar codes

Bertrand Le Gal, Christophe Jégo, Camille Leroux, 2017, 2017 IEEE International Workshop on Signal Processing Systems (SiPS).

Fast Converging ADMM-Penalized Algorithm for LDPC Decoding

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2016, IEEE Communications Letters.

An Efficient, Portable and Generic Library for Successive Cancellation Decoding of Polar Codes

Bertrand Le Gal, Camille Leroux, Denis Barthou, 2015, LCPC.

Pipelined memory controllers for DSP applications handling unpredictable data accesses

Bertrand Le Gal, Emmanuel Casseau, Eric Martin, 2005, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05).

High speed LDPC decoding for optical space link

Bertrand Le Gal, Lyonel Barthe, Christophe Jégo, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

IP Generation Targeting Multiple Bit-Width Standards

Bertrand Le Gal, Emmanuel Casseau, E. Casseau, 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

FPGA prototyping of an ASIP LDPC decoder for the DVB-T2 standard

Bertrand Le Gal, Christophe Jégo, 2012, Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing.

Comparison of different schedulings for the ADMM based LDPC decoding

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2016, 2016 9th International Symposium on Turbo Codes and Iterative Information Processing (ISTC).

A low-area filter bank design methodology for on-chip ADC testing

Bertrand Le Gal, Lilian Bossuet, Dominique Dallet, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

C-based rapid prototyping for digital signal processing

Bertrand Le Gal, Christophe Jégo, Emmanuel Casseau, 2005, 2005 13th European Signal Processing Conference.

Model-based Design of Efficient LDPC Decoder Architectures

Yann Delomier, Bertrand Le Gal, Jérémie Crenne, 2018, 2018 IEEE 10th International Symposium on Turbo Codes & Iterative Information Processing (ISTC).

Analysis of ADMM-LP algorithm for LDPC decoding, a first step to hardware implementation

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

Design of an ASIP LDPC Decoder Compliant with Digital Communication Standards

Bertrand Le Gal, Christophe Jégo, C. Jégo, 2012, 2012 IEEE Workshop on Signal Processing Systems.

A Flexible SoC and Its Methodology for Parser-Based Applications

Yérom-David Bromberg, Bertrand Le Gal, Laurent Réveillère, 2016, ACM Trans. Reconfigurable Technol. Syst..

Automated multimode system design for high performance DSP applications

Bertrand Le Gal, Emmanuel Casseau, 2009, 2009 17th European Signal Processing Conference.

Low-latency software LDPC decoders for x86 multi-core devices

Bertrand Le Gal, Christophe Jégo, C. Jégo, 2017, 2017 IEEE International Workshop on Signal Processing Systems (SiPS).

Reed-Solomon behavioral virtual component for communication systems

Bertrand Le Gal, Christophe Jégo, Emmanuel Casseau, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Lowering the error floor of double-binary turbo codes: The flip and check algorithm

Bertrand Le Gal, Christophe Jégo, Thibaud Tonnellier, 2016, 2016 9th International Symposium on Turbo Codes and Iterative Information Processing (ISTC).

Reduced complexity ADMM-based schedules for LP decoding of LDPC convolutional codes

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2017, 2017 IEEE International Workshop on Signal Processing Systems (SiPS).

GPU-like on-chip system for decoding LDPC codes

Bertrand Le Gal, Christophe Jégo, C. Jégo, 2014, ACM Trans. Embed. Comput. Syst..

High-Throughput Multi-Core LDPC Decoders Based on x86 Processor

Bertrand Le Gal, Christophe Jégo, C. Jégo, 2016, IEEE Transactions on Parallel and Distributed Systems.

A scalable and efficient digital signal processing system for real time biological spike detection

Yannick Bornat, Bertrand Le Gal, Safouane Noubir, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios

Bertrand Le Gal, Lilian Bossuet, Guy Gogniat, 2011, ARC.

Bit-Width Aware High-Level Synthesis for Digital Signal Processing Systems

Bertrand Le Gal, Emmanuel Casseau, Caaliph Andriamisaina, 2006, SoCC.

High-Throughput LDPC Decoder on Low-Power Embedded Processors

Bertrand Le Gal, Christophe Jégo, 2015, IEEE Communications Letters.

Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems

Bertrand Le Gal, Emmanuel Casseau, Caaliph Andriamisaina, 2006, 2006 IEEE Workshop on Signal Processing Systems Design and Implementation.

Automatic low-cost IP watermarking technique based on output mark insertions

Bertrand Le Gal, Lilian Bossuet, L. Bossuet, 2012, Des. Autom. Embed. Syst..

Multi-Gb/s Software Decoding of Polar Codes

Bertrand Le Gal, Christophe Jégo, Camille Leroux, 2015, IEEE Transactions on Signal Processing.

Design and Implementation of a Reconfigurable Decimation and Channel Selection Filter for GSM and UMTS Radio Standards

Bertrand Le Gal, Nadia Khouja, Khaled Grati, 2009, 2009 IEEE Wireless Communications and Networking Conference.

Implementation aspects of a pipeline ADMM-based LP decoding of LDPC convolutional codes

Bertrand Le Gal, Christophe Jégo, Nadia Khouja, 2018, 2018 IEEE Wireless Communications and Networking Conference (WCNC).

Model-based Design of Hardware SC Polar Decoders for FPGAs

Bertrand Le Gal, Christophe Jego, Yann Delomier, 2020, ACM Trans. Reconfigurable Technol. Syst..

Softcore Processor Optimization According to Real-Application Requirements

Bertrand Le Gal, Christophe Jégo, C. Jégo, 2013, IEEE Embedded Systems Letters.

Generation of Efficient Self-adaptive Hardware Polar Decoders Using High-Level Synthesis

Yann Delomier, Bertrand Le Gal, Jeremie Crenne, 2019, 2019 IEEE International Workshop on Signal Processing Systems (SiPS).

Mathematical functions based watermarking for IPP

Bertrand Le Gal, Lilian Bossuet, Dominique Dallet, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

Synthèse de haut niveau tenant compte de la dynamique des traitements. Analyse de la largeur des données d'applications du TDSI et gestion de cette information lors de la synthèse de haut niveau

Bertrand Le Gal, Emmanuel Casseau, Caaliph Andriamisaina, 2008, Tech. Sci. Informatiques.

Spatial downsizing impact in the transrating tradeoff for content/context awareness in media network

Bertrand Le Gal, Dominique Dallet, Daniel Négru, 2012, 2012 International Conference on Telecommunications and Multimedia (TEMU).

AFF3CT: A Fast Forward Error Correction Toolbox!

Bertrand Le Gal, Kun He, Thibaud Tonnellier, 2019, SoftwareX.

Hardware architecture for lowering the error floor of LTE turbo codes

Bertrand Le Gal, Christophe Jégo, Thibaud Tonnellier, 2016, 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP).

Behavioral Assertion Support in HLS Design Flow.

Bertrand Le Gal, Lilian Bossuet, Dominique Dallet, 2010 .

Latency-Sensitive High-Level Synthesis for Multiple Word-Length DSP Design

Bertrand Le Gal, Emmanuel Casseau, 2011, EURASIP J. Adv. Signal Process..

A Reconfigurable Multi-core Cryptoprocessor for Multi-channel Communication Systems

Bertrand Le Gal, Lilian Bossuet, Guy Gogniat, 2011, 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum.

Power Consumption Models for Decimation FIR Filters in Multistandard Receivers

Bertrand Le Gal, Nadia Khouja, Khaled Grati, 2012, VLSI Design.

Fair comparison of hardware and software LDPC decoder implementations for SDR space links

Bertrand Le Gal, Lyonel Barthe, Christophe Jégo, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Hardware virtual components compliant with communication system standards

Bertrand Le Gal, Christophe Jégo, Emmanuel Casseau, 2005, 8th Euromicro Conference on Digital System Design (DSD'05).

A new orthogonal online digital calibration for time-interleaved analog-to-digital converters

Bertrand Le Gal, Lilian Bossuet, Dominique Dallet, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A High Throughput Efficient Approach for Decoding LDPC Codes onto GPU Devices

Bertrand Le Gal, Jérémie Crenne, Christophe Jégo, 2014, IEEE Embedded Systems Letters.