Jérémie Crenne

发表

From multicore LDPC decoder implementations to FPGA decoder architectures: a case study

Yann Delomier, Bertrand Le Gal, Jérémie Crenne, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Ultra-Fast Downloading of Partial Bitstreams through Ethernet

Jérémie Crenne, Guy Gogniat, Jean-Philippe Diguet, 2009, ARCS.

Networked Self-adaptive Systems: An Opportunity for Configuring in the Large

Jérémie Crenne, Guy Gogniat, Jean-Philippe Diguet, 2009, ERSA.

Lightweight reconfiguration security services for AXI-based MPSoCs

Jérémie Crenne, Guy Gogniat, Jean-Philippe Diguet, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis

Yann Delomier, Bertrand Le Gal, Jérémie Crenne, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Self-reconfigurable Embedded Systems: From Modeling to Implementation

Jérémie Crenne, Guy Gogniat, Jean-Philippe Diguet, 2010, ERSA.

Modeling dynamic partial reconfiguration in the dataflow paradigm

Jérémie Crenne, Jonathan Piat, 2014, 2014 IEEE Workshop on Signal Processing Systems (SiPS).

Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems

Jérémie Crenne, Guy Gogniat, Jean-Philippe Diguet, 2008, 2008 International Symposium on Parallel and Distributed Computing.

Scalable network virtualization using FPGAs

Lixin Gao, Yong Liao, Jérémie Crenne, 2010, FPGA '10.

Reconfigurable Data Planes for Scalable Network Virtualization

Lixin Gao, Yong Liao, Jérémie Crenne, 2013, IEEE Transactions on Computers.

Model-based Design of Efficient LDPC Decoder Architectures

Yann Delomier, Bertrand Le Gal, Jérémie Crenne, 2018, 2018 IEEE 10th International Symposium on Turbo Codes & Iterative Information Processing (ISTC).

Configurable memory security in embedded systems

Jérémie Crenne, Russell Tessier, Guy Gogniat, 2013, TECS.

Lynq: A Lightweight Software Layer for Rapid SoC FPGA Prototyping

Jérémie Crenne, Russell Tessier, Dominique Dallet, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

Distributed Security for Communications and Memories in a Multiprocessor Architecture

Jérémie Crenne, Guy Gogniat, Jean-Philippe Diguet, 2011, 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum.

Efficient key-dependent message authentication in reconfigurable hardware

Jérémie Crenne, Russell Tessier, Guy Gogniat, 2011, 2011 International Conference on Field-Programmable Technology.

Bus-based MPSoC Security through Communication Protection: A Latency-efficient Alternative

Jérémie Crenne, Guy Gogniat, Jean-Philippe Diguet, 2012, 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines.

Sécurité haut débit pour les systèmes embarqués à base de FPGAs

Jérémie Crenne, Jérémie Crenne, 2011 .

SecURe DPR: Secure update preventing replay attacks for dynamic partial reconfiguration

Jérémie Crenne, Pascal Benoit, Lionel Torres, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

A High Throughput Efficient Approach for Decoding LDPC Codes onto GPU Devices

Bertrand Le Gal, Jérémie Crenne, Christophe Jégo, 2014, IEEE Embedded Systems Letters.

An Energy Efficient and Scalable Node Architecture for Sensor Network

Jérémie Crenne, Christophe Jégo, Nicolas Hanusse, 2021, 2021 19th IEEE International New Circuits and Systems Conference (NEWCAS).