H. Ando

A 1.3GHz fifth generation SPARC64 microprocessor

H. Ando, Y. Yoshida, A. Inoue, 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

A case study: power and performance improvement of a chip multiprocessor for transaction processing

Nestoras Tzartzanis, William W. Walker, Hisashige Ando, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 1.3 GHz fifth generation SPARC64 microprocessor

Hiroyuki Sugiyama, Hideo Yamashita, Yuuji Yoshida, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

Performance prediction of large-scale parallell system and application using macro-level simulation

Yuichi Inadomi, Kazuaki Murakami, Koji Inoue, 2008, 2008 SC - International Conference for High Performance Computing, Networking, Storage and Analysis.

Microprocessor Architecture for Yield Enhancement and Reliable Operation

Hisashige Ando, H. Ando, 2006 .

A Case Study: Energy Efficient High Throughput Chip Multi-Processor Using Reduced-complexity Cores for Transaction Processing Workload

William W. Walker, Motoyuki Kawaba, Hisashige Ando, 2005 .

Validation of hardware error recovery mechanisms for the SPARC64 V microprocessor

Ryuji Kan, Yoshiharu Tosaka, Hisashige Ando, 2008, 2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN).