C. Yeh

Layout techniques supporting the use of dual supply voltages for cell-based designs

C. Yeh, Yin-Shuin Kang, S. Shieh, 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

On removing multiple redundancies in combinational circuits

Shih-Chieh Chang, C. Yeh, D. Ihsin Cheng, 1998, Proceedings Design, Automation and Test in Europe.

A power-aware SNR-progressive DCT/IDCT IP core design for multimedia transform coding

Jiun-In Guo, Chingwei Yeh, Kuan-Hung Chen, 2004, 2004 IEEE International Conference on Multimedia and Expo (ICME) (IEEE Cat. No.04TH8763).

Gate-level design exploiting dual supply voltages for power-driven applications

Shih-Chieh Chang, C. Yeh, W. Jone, 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361).

Design of High-Performance CMOS Level Converters Considering PVT Variations

Chingwei Yeh, Jinn-Shyan Wang, Yu-Juey Chang, 2011, IEICE Trans. Electron..

Heuristic Sizing Methodology for Designing High-Performance CMOS Level Converters with Balanced Rise and Fall Delays

Chingwei Yeh, Jinn-Shyan Wang, Yu-Juey Chang, 2010, IEICE Trans. Electron..

A probabilistic multicommodity-flow solution to circuit clustering problems

C. Yeh, Chung-Kuan Cheng, T.-T.Y. Lin, 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

Circuit clustering using a stochastic flow injection method

Chingwei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..