T. Chung

Sub-10 nm gate-all-around CMOS nanowire transistors on bulk Si substrate

S. Suk, Ming Li, K. Yeo, 2006, 2009 Symposium on VLSI Technology.

A novel thin BOX SOI technology using bulk Si wafer for system-on-chip (SoC) application

Chang Woo Oh, Hyun Jun Bae, Dong-Won Kim, 2006, 2009 Symposium on VLSI Technology.

Characteristics of sub 5nm tri-gate nanowire MOSFETs with single and poly Si channels in SOI structure

Kyoung Hwan Yeo, Dong-Won Kim, S. Suk, 2006, 2009 Symposium on VLSI Technology.