Y. Lee

A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications

S. Narasimha, M. Hargrove, R. Pal, 2011, 2011 International Electron Devices Meeting.

A cost effective 32nm high-K/ metal gate CMOS technology for low power applications with single-metal/gate-first process

X. Chen, M. Khare, D. Tekleab, 2008, 2008 Symposium on VLSI Technology.

Accurate performance evaluation for the horizontal nanosheet standard-cell design space beyond 7nm technology

L. Liebmann, Y. M. Lee, M. H. Na, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).