H. Iwamoto

发表

Novel Channel-Stress Enhancement Technology with eSiGe S/D and Recessed Channel on Damascene Gate Process

Y. Tagawa, M. Saito, N. Nagashima, 2007, 2007 IEEE Symposium on VLSI Technology.

Extreme High-Performance n- and p-MOSFETs Boosted by Dual-Metal/High-k Gate Damascene Process using Top-Cut Dual Stress Liners on (100) Substrates

Y. Tagawa, M. Saito, N. Nagashima, 2007, 2007 IEEE International Electron Devices Meeting.

Novel stacked CMOS image sensor with advanced Cu2Cu hybrid bonding

K. Ohno, H. Iwamoto, Y. Kagawa, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

An Advanced CuCu Hybrid Bonding For Novel Stacked CMOS Image Sensor

K. Ohno, H. Iwamoto, Y. Kagawa, 2018, 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM).

Behavior of Bonding Strength on Wafer-to-Wafer Cu-Cu Hybrid Bonding

H. Iwamoto, Y. Hagimoto, T. Hirano, 2022, 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).

On-wafer monitoring and control of ion energy distribution for damage minimization in atomic layer etching processes

K. Kugimiya, H. Iwamoto, M. Fukasawa, 2020, Japanese Journal of Applied Physics.

Diffusion mechanism of fluorine in plasma processing of III–V semiconductor compounds

K. Kugimiya, H. Iwamoto, H. Minari, 2020, Japanese Journal of Applied Physics.

High Performance and High Reliability Dual Metal CMOS Gate Stacks Using Novel High-k Bi-layer Control Technique

T. Ando, Y. Tagawa, M. Saito, 2007, 2007 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).

IR sensitivity enhancement of CMOS Image Sensor with diffractive light trapping pixels

Suguru Saito, Itaru Oshiyama, Hayato Iwamoto, 2017, Scientific Reports.

Defects of Silicon Substrates Caused by Electro-Static Discharge in Single Wafer Cleaning Process

H. Iwamoto, Y. Hagimoto, Takuro Fukunaga, 2009 .

Characteristics of in-situ phosphorus-doped silicon selective epitaxial growth at atmospheric pressure

Heiji Watanabe, H. Iwamoto, S. Kadomura, 2008 .

Investigation of In-situ Boron-Doped Si Selective Epitaxial Growth by Comparison with Arsenic Doping

Heiji Watanabe, H. Iwamoto, S. Kadomura, 2008 .

Suppression of surface segregation and heavy arsenic doping into silicon during selective epitaxial chemical vapor deposition under atmospheric pressure

Heiji Watanabe, H. Iwamoto, S. Kadomura, 2007 .

Atmospheric In situ Arsenic-Doped SiGe Selective Epitaxial Growth for Raised-Extension N-type Metal–Oxide–Semiconductor Field-Effect Transistor

Heiji Watanabe, Y. Miyanami, H. Iwamoto, 2007 .

Heavy arsenic doping of silicon grown by atmospheric pressure selective epitaxial chemical vapor deposition

Heiji Watanabe, Y. Miyanami, H. Iwamoto, 2007 .

In situ arsenic-doped Si1−yCy selective epitaxial growth under atmospheric pressure

Heiji Watanabe, H. Iwamoto, S. Kadomura, 2008 .

Selective epitaxial growth of in situ carbon‐doped silicon on silicon substrates

Heiji Watanabe, H. Iwamoto, S. Kadomura, 2008 .

Impacts of Misalignment on 1μm Pitch Cu-Cu Hybrid Bonding

H. Iwamoto, H. Hashiguchi, Y. Kagawa, 2020, 2020 IEEE International Interconnect Technology Conference (IITC).

3D Integration Technologies for the Stacked CMOS Image Sensors

Y. Kagawa, H. Iwamoto, H. Iwamoto, 2019, 2019 International 3D Systems Integration Conference (3DIC).

3D Sequential Process Integration for CMOS Image Sensor

T. Hirano, H. Iwamoto, K. Zaitsu, 2021, 2021 IEEE International Electron Devices Meeting (IEDM).

Development of face-to-face and face-to-back ultra-fine pitch Cu-Cu hybrid bonding

T. Hirano, H. Iwamoto, Y. Kagawa, 2022, 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).

Low power consumption and high resolution 1280X960 Gate Assisted Photonic Demodulator pixel for indirect Time of flight

H. Iwamoto, H. Yamagishi, A. Basavalingappa, 2020, 2020 IEEE International Electron Devices Meeting (IEDM).

IR sensitivity enhancement of CMOS Image Sensor with diffractive light trapping pixels

T. Hirano, H. Iwamoto, I. Oshiyama, 2017, Scientific Reports.

Application of HfSiON to Deep-Trench Capacitors of Sub-45-nm-Node Embedded Dynamic Random-Access Memory

R. Katsumata, T. Ando, T. Hirano, 2006 .

The Scaling of Cu-Cu Hybrid Bonding For High Density 3D Chip Stacking

K. Takahashi, K. Tatani, S. Kadomura, 2019, 2019 Electron Devices Technology and Manufacturing Conference (EDTM).

High-definition Visible-SWIR InGaAs Image Sensor using Cu-Cu Bonding of III-V to Silicon Wafer.

H. Iwamoto, H. Minari, N. Fujii, 2019, 2019 IEEE International Electron Devices Meeting (IEDM).

Low Threshold Voltage and High Mobility N-Channel Metal–Oxide–Semiconductor Field-Effect Transistor Using Hf–Si/HfO2 Gate Stack Fabricated by Gate-Last Process

T. Ando, Heiji Watanabe, T. Hirano, 2010 .

Mechanism of Carrier Mobility Degradation Induced by Crystallization of HfO2 Gate Dielectrics

T. Ando, Heiji Watanabe, T. Hirano, 2009 .

High Performance Dual Metal Gate CMOS with High Mobility and Low Threshold Voltage Applicable to Bulk CMOS Technology

T. Ando, Y. Tagawa, M. Saito, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Evaluation of the Plasmaless Gaseous Etching Process

H. Iwamoto, Y. Hagimoto, Y. Muraki, 2007 .

Visible Light Sensitivity Enhancement of CMOS Image Sensor with Pseudo High Refractive Index Film Integrated by Directed Self-Assembly Process

T. Hirano, H. Iwamoto, I. Oshiyama, 2021, 2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM).

Five-step plasma-enhanced atomic layer etching of silicon nitride with a stable etched amount per cycle

K. Kugimiya, H. Iwamoto, Y. Hagimoto, 2022, Japanese Journal of Applied Physics.

Mechanism of SiN etching rate fluctuation in atomic layer etching

K. Kugimiya, H. Iwamoto, M. Fukasawa, 2020, Journal of Vacuum Science & Technology A.

Tinv Scaling and Gate Leakage Reduction for n-Type Metal Oxide Semiconductor Field Effect Transistor with HfSix/HfO2 Gate Stack by Interfacial Layer Formation Using Ozone–Water-Last Treatment

T. Ando, M. Saito, N. Nagashima, 2008 .