R. Palla

50 nm-Gate All Around (GAA)-Silicon On Nothing (SON)-devices: a simple way to co-integration of GAA transistors within bulk MOSFET process

T. Skotnicki, D. Dutartre, P. Ribot, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

16 nm planar NMOSFET manufacturable within state-of-the-art CMOS process thanks to specific design and optimisation

T. Skotnicki, S. Monfray, D. Dutartre, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Nickel vs. cobalt silicide integration for sub-50nm CMOS

R. Pantel, F. Boeuf, F. Wacquant, 2003, ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003..

Emerging silicon-on-nothing (SON) devices technology

Stephane Monfray, T. Skotnicki, D. Chanemougame, 2004 .

Highly-performant 38 nm SON (silicon-on-nothing) P-MOSFETs with 9 nm-thick channels

M. Haond, T. Skotnicki, S. Monfray, 2002, 2002 IEEE International SOI Conference.

Continuous molecular beam epitaxy of arsenides and phosphides applied to device structures on InP substrates

R. Palla, J. Harmand, J. Pelouard, 1995 .

AlInAs/GaInAs HEMT with AlInP barrier layer

R. Palla, J. Harmand, S. Biblemont, 1996, Proceedings of 8th International Conference on Indium Phosphide and Related Materials.