A. Du

发表

Enhanced performance in 50 nm N-MOSFETs with silicon-carbon source/drain regions

Y. Yeo, G. Samudra, N. Balasubramanian, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Lattice strain analysis of transistor structures with silicon–germanium and silicon–carbon source∕drain stressors

Kah-Wee Ang, King-Jien Chui, Yee-Chia Yeo, 2005 .

Investigation of Barrier Property of Amorphous Co–Ti Layer as Single Barrier/Liner in Local Co Interconnects

Tianchun Ye, Yaodong Liu, Jianfeng Gao, 2020, IEEE Transactions on Electron Devices.

A novel three-layer graded SiGe strain relaxed buffer for the high crystal quality and strained Si0.5Ge0.5 layer epitaxial grown

A. Du, Guilei Wang, Jun Luo, 2019, Journal of Materials Science: Materials in Electronics.

Study on Thermal Stability of Plasma- PH3 Passivated HfAlO / In0.53Ga0.47As Gate Stack for Advanced Metal-Oxide-Semiconductor Field Effect Transistor

A. Du, C. Ng, S. A. Suleiman, 2010 .

An electrical study of behaviors of Si nanocrystals distributed in the gate oxide near the oxide/substrate interface of a MOS structure

T. P. Chen, A. Du, O. Tan, 2006 .

Study of Silicon Nitride Inner Spacer Formation in Process of Gate-all-around Nano-Transistors

Jianfeng Gao, A. Du, Guilei Wang, 2020, Nanomaterials.

First-step nucleation growth dependence of InAs/InGaAs/InP quantum dot formation in two-step growth

Z. Yin, J. Teng, A. Du, 2008, Nanotechnology.

Orientation control of epitaxial Ge thin films growth on SrTiO3 (100) by ultrahigh vacuum sputtering

Y. Feng, A. Du, J. Chai, 2012 .

An Investigation of Field Reduction Effect on NBTI Parameter Characterization and Lifetime Prediction Using a Constant Field Stress Method

E. Simoen, Z. Ji, A. Du, 2020, IEEE Transactions on Device and Materials Reliability.

A Novel Dry Selective Isotropic Atomic Layer Etching of SiGe for Manufacturing Vertical Nanowire Array with Diameter Less than 20 nm

Jianfeng Gao, A. Du, Guilei Wang, 2020, Materials.

Strain engineering of ultra-thin silicon-on-insulator structures using through-buried-oxide ion implantation and crystallization

Y. Yeo, B. Nguyen, N. Daval, 2013 .

Selective Digital Etching of Silicon-Germanium using Nitric and Hydrofluoric Acids.

A. Du, Guilei Wang, Huilong Zhu, 2020, ACS applied materials & interfaces.

Impact of Ge pre-amorphization implantation on Co/Co-Ti/n+-Si contacts in advanced Co interconnects

Tianchun Ye, Jun Luo, Yaodong Liu, 2020, Japanese Journal of Applied Physics.

EELS chemical bond characterization of process induced damages in low-k dielectric films

Juan Boon Tan, A. Du, Siping Zhao, 2012, 2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits.

Impact of Electron trapping on Energy Distribution Characterization of NBTI-Related Defects for Si p-FinFETs

Z. Ji, A. Du, H. Yin, 2020, 2020 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).

Selective wet etching in fabricating SiGe nanowires with TMAH solution for gate-all-around MOSFETs

A. Du, Jun Luo, Wenwu Wang, 2020, Journal of Materials Science: Materials in Electronics.

Strained Si0.2Ge0.8/Ge multilayer Stacks Epitaxially Grown on a Low-/High-Temperature Ge Buffer Layer and Selective Wet-Etching of Germanium

Luyue Xie, A. Du, Guilei Wang, 2020, Nanomaterials.

A Study of Selectively Digital Etching Silicon-Germanium with Nitric and Hydrofluoric Acids

Technology of China, A. Du, Guilei Wang, 2020, 2003.03529.

Effect of rapid thermal annealing on the ordering of AlInP grown by metal-organic vapor-phase epitaxy

Z. Yin, A. Du, M. Chin, 2005 .

Investigation of silicon-germanium fins fabricated using germanium condensation on vertical compliant structures

Y. Yeo, N. Balasubramanian, A. Du, 2005 .

A Two-Step Oxidation Mediated Condensation Process for Ultrathin High Ge Content SiGe Epitaxial Films on Insulator

S. Balakumar, D. Kwong, N. Balasubramanian, 2005 .

Nanocantilevers made of bent silicon carbide nanowire-in-silicon oxide nanocones

C. Boothroyd, K. Loh, A. Du, 2004 .

Improved Ti germanosilicidation by Ge pre-amorphization implantation (PAI) for advanced contact technologies

Tianchun Ye, Jun Luo, Jing Xu, 2018, Microelectronic Engineering.

Formation of dual-phase HfO2–HfxSi1−xO2 dielectric and its application in memory devices

Y. Yeo, A. Chin, A. Du, 2005 .

Effects of InxGa1−xAs matrix layer on InAs quantum dot formation and their emission wavelength

Z. Yin, A. Du, X. Tang, 2006 .

Epitaxial growth of Sc2O3 films on GaN (0001) by pulsed laser deposition

Eng Fong Chor, Leng Seow Tan, Anyan Du, 2007 .

N-type Schottky barrier source/drain MOSFET using ytterbium silicide

A. Chin, D. Kwong, A. Chin, 2004, IEEE Electron Device Letters.

Advance TEM application in 10 nm and below technology node chips

A. Du, Wenwu Wang, Hong Yang, 2022, Conference on Computer Science and Communication Technology.

Fabrication of poly-Si TFT with silicided Schottky barrier source/drain, high-κ gate dielectric and metal gate

Ming-Fu Li, Janak Singh, Chunxiang Zhu, 2006 .

Impact of programming mechanisms on the performance and reliability of nonvolatile memory devices based on Si nanocrystals

T.P. Chen, A. Du, M. Yang, 2006, IEEE Transactions on Electron Devices.

Joining copper oxide nanotube arrays driven by the nanoscale Kirkendall effect.

Mei Zhen Ng, W. A. Sasangka, A. Du, 2013, Small.

Effectiveness of Repairing Hot Carrier Degradation in Si p-FinFETs Using Gate Induced Drain Leakage

A. Du, Junfeng Li, H. Yin, 2023, IEEE Electron Device Letters.

Investigation on the formation technique of SiGe Fin for the high mobility channel FinFET device

A. Du, Guilei Wang, Jun Luo, 2019, Journal of Materials Science: Materials in Electronics.

Schottky-barrier S/D MOSFETs with high-k gate dielectrics and metal-gate electrode

D.S.H. Chan, A. Chin, D. Kwong, 2004, IEEE Electron Device Letters.

Formation of Ge nanocrystals in HfAlO high-k dielectric and application in memory device

Narayanan Balasubramanian, Dim-Lee Kwong, Yee-Chia Yeo, 2004 .

Evidence of ultra-low-k dielectric material degradation and nanostructure alteration of the Cu/ultra-low-k interconnects in time-dependent dielectric breakdown failure

Fan Zhang, Jeffrey Lam, Zexiang Shen, 2013 .

Germanium pMOSFETs with Schottky-barrier germanide S/D, high-/spl kappa/ gate dielectric and metal gate

A. Chin, D. Kwong, A. Chin, 2005, IEEE Electron Device Letters.

MOVPE growth of InAs quantum dots for mid-IR applications

Jinghua Zhao, Zongyou Yin, Z. Yin, 2006 .

Thermally robust high quality HfN/HfO/sub 2/ gate stack for advanced CMOS devices

D.S.H. Chan, J.F. Kang, J.D. Chen, 2003, IEEE International Electron Devices Meeting 2003.

Process optimization of the Si0.7Ge0.3 Fin Formation for the STI first scheme

A. Du, Guilei Wang, Junfeng Li, 2019, Semiconductor Science and Technology.

High crystalline quality of SiGe fin fabrication with Si-rich composition area using replacement fin processing

A. Du, Wenwu Wang, Zhenhua Wu, 2020 .

Investigation on Recrystallization Channel for Vertical C-Shaped-Channel Nanosheet FETs by Laser Annealing

A. Du, Guilei Wang, Jinbiao Liu, 2023, Nanomaterials.

High-Quality Recrystallization of Amorphous Silicon on Si (100) Induced via Laser Annealing at the Nanoscale

A. Du, Guilei Wang, Jinbiao Liu, 2023, Nanomaterials.

Physical Insights of Si-Core-SiGe-Shell Gate-All-Around Nanosheet pFET for 3 nm Technology Node

A. Du, Lei Cao, H. Yin, 2023, IEEE Transactions on Electron Devices.

Investigation on Ge0.8Si0.2-Selective Atomic Layer Wet-Etching of Ge for Vertical Gate-All-Around Nanodevice

A. Du, Guilei Wang, Huilong Zhu, 2021, Nanomaterials.