J. Núñez-Yáñez

发表

Adaptive voltage scaling in a heterogeneous FPGA device with memory and logic in-situ detectors

José Núñez-Yáñez, J. Núñez-Yáñez, 2017, Microprocess. Microsystems.

Statistical Lossless Compression of Space Imagery and General Data in a Reconfigurable Architecture

Xiaolin Chen, Cedric Nishan Canagarajah, C. N. Canagarajah, 2008, 2008 NASA/ESA Conference on Adaptive Hardware and Systems.

Hardware architecture for lossless image compression based on context-based modeling and arithmetic coding

Xiaolin Chen, Cedric Nishan Canagarajah, C. N. Canagarajah, 2007, 2007 IEEE International SOC Conference.

Nunez-Yanez, J. (2017). Adaptive voltage scaling in a heterogeneous FPGA

J. Núñez-Yáñez, 2017 .

Nunez-Yanez, J. L. (2015). Adaptive Voltage Scaling with In-Situ Detectors

J. Núñez-Yáñez, 2016 .

A configurable statistical lossless compression core based on variable order Markov modeling and arithmetic coding

José L. Núñez-Yáñez, Vassilios A. Chouliaras, J. Núñez-Yáñez, 2005, IEEE Transactions on Computers.

FINE-GRAINED VECTOR-LESS SCALABLE VIDEO CODING FOR SPACE APPLICATIONS

J. Núñez-Yáñez, Trevor Spiteri, 2010 .

Robust and accurate fine-grain power models for embedded systems with no on-chip PMU

K. Eder, J. Núñez-Yáñez, Kyriakos Georgiou, 2021, IEEE Embedded Systems Letters.

Scalar and parametric vector accelerators for the G.729A speech coding standard

Jose L Nunez-Yanez, Sekharjit Datta, David Mulvaney, 2004 .

in a software-defined heterogeneous FPGA.

J. Núñez-Yáñez, A. Navarro, R. Asenjo, 2018 .

Big–Little Adaptive Neural Networks on Low-Power Near-Subthreshold Processors

J. Núñez-Yáñez, Zichao Shen, Neil Howard, 2022, Journal of Low Power Electronics and Applications.

Remaining useful life estimation using Long Short-term Memory (LSTM) neural networks deep fusion.

J. Núñez-Yáñez, N. Lieven, P. Hutchinson, 2020 .

Fused Architecture for Dense and Sparse Matrix Processing in TensorFlow Lite

J. Núñez-Yáñez, 2022, IEEE Micro.

Nunez-Yanez, J. L., & Chouliaras, V. A. (2005). A Configurable Statistical Lossless Compression Core Based on Variable Order Markov Modeling and Arithmetic

J. Núñez-Yáñez, 2005 .

Numerically efficient and biophysically accurate neuroprocessing platform

Joe McGeehan, José Luis Núñez-Yáñez, Juan Carlos Moctezuma, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

Joint video fusion and super resolution based on Markov random fields

Jin Chen, Alin Achim, José L. Núñez-Yáñez, 2014, 2014 IEEE International Conference on Image Processing (ICIP).

Bayesian Video Super-Resolution With Heavy-Tailed Prior Models

Alin Achim, A. Achim, J. Núñez-Yáñez, 2014, IEEE Transactions on Circuits and Systems for Video Technology.

Video super-resolution using low rank matrix completion

Jin Chen, Alin Achim, José L. Núñez-Yáñez, 2013, 2013 IEEE International Conference on Image Processing.

Approximate alpha-stable Markov Random Fields for video super-resolution

Jin Chen, Alin Achim, José L. Núñez-Yáñez, 2012, 2012 Proceedings of the 20th European Signal Processing Conference (EUSIPCO).

Video Super-Resolution Using Generalized Gaussian Markov Random Fields

Jin Chen, Alin Achim, José L. Núñez-Yáñez, 2012, IEEE Signal Processing Letters.

Neuron Dynamics of Two-compartment Traub Model for Hardware-based Emulation

Joe McGeehan, José Luis Núñez-Yáñez, Juan Carlos Moctezuma, 2014, IJCCI.

Customization of an embedded RISC CPU with SIMD extensions for video encoding: A case study

Dionysios I. Reisis, José L. Núñez-Yáñez, Vassilios A. Chouliaras, 2008, Integr..

Remaining Useful Life Estimation Using Long Short-Term Memory Neural Networks and Deep Fusion

Yang Zhang, Jose Nunez-Yanez, Paul Hutchinson, 2020, IEEE Access.

System-on-Chip Design Framework ( SDF ) unifying Specification Capture and Design Modeling

A. K. Kumaraswamy, J. Núñez-Yáñez, V. Chouliaras, 2005 .

Power modelling and capping for heterogeneous ARM/FPGA SoCs

Dimitrios S. Nikolopoulos, Roger F. Woods, José L. Núñez-Yáñez, 2014, 2014 International Conference on Field-Programmable Technology (FPT).

Adaptive event-triggered anomaly detection in compressed vibration data

Jose L Nunez-Yanez, Yang Zhang, Nicholas A J Lieven, 2019, Mechanical Systems and Signal Processing.

Optimal compression of vibration data with lifting wavelet transform and context-based arithmetic coding

Yang Zhang, José Núñez-Yáñez, Paul Hutchinson, 2017, 2017 25th European Signal Processing Conference (EUSIPCO).

Task Dispersal Measurement in Dynamic Reconfigurable NoCs

Mohammad Hosseinabady, José Luis Núñez-Yáñez, Antonio Marcello Coppola, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Run-time power gating in hybrid ARM-FPGA devices

Mohammad Hosseinabady, José Luis Núñez-Yáñez, J. Núñez-Yáñez, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Dynamic Reconfiguration Optimisation with Streaming Data Decompression

José L. Núñez-Yáñez, Atukem Nabina, J. Núñez-Yáñez, 2010, 2010 International Conference on Field Programmable Logic and Applications.

Biophysically Accurate Foating Point Neuroprocessors for Reconfigurable Logic

Yiwei Zhang, Stephen Kelly, Joseph P. McGeehan, 2013, IEEE Transactions on Computers.

Fast motion estimation using configurable and extendible processing cores

George Vafiadis, Trevor Spiteri, Mohammed Faies, 2009, 2009 Conference Record of the Forty-Third Asilomar Conference on Signals, Systems and Computers.

A toolset for the analysis and optimization of motion estimation algorithms and processors

José Luis Núñez-Yáñez, George Vafiadis, Trevor Spiteri, 2009, 2009 International Conference on Field Programmable Logic and Applications.

ESTIMATION PROCESSORS FOR HIGH DEFINITION VIDEO CODING

J. Núñez-Yáñez, Trevor Spiteri, G. Vafiadis, 2009 .

Intra and inter-core power modelling for single-ISA heterogeneous processors

José L. Núñez-Yáñez, Krastin Nikov, J. Núñez-Yáñez, 2020, Int. J. Embed. Syst..

Differential patterning of neuronal, glial and neural progenitor cells on phosphorus-doped and UV irradiated diamond-like carbon.

Andrew D Dick, Frederik Claeyssens, Jose Nunez-Yanez, 2010, Biomaterials.

Extending the PCIe Interface with Parallel Compression/Decompression Hardware for Energy and Performance Optimization

Jose L Nunez-Yanez, Mohd Amiruddin Bin Zainol, J. Núñez-Yáñez, 2018 .

Energy Proportional Neural Network Inference with Adaptive Voltage and Frequency Scaling

Jose Nunez-Yanez, J. Núñez-Yáñez, 2019, IEEE Transactions on Computers.

Exploring heterogeneous scheduling for edge computing with CPU and FPGA MPSoCs

Rafael Asenjo, José L. Núñez-Yáñez, Francisco Corbera, 2019, J. Syst. Archit..

Adaptive Voltage Scaling with In-Situ Detectors in Commercial FPGAs

José Luis Núñez-Yáñez, J. Núñez-Yáñez, 2015, IEEE Transactions on Computers.

Sparse Matrix-Dense Matrix Multiplication on Heterogeneous CPU+FPGA Embedded System

Mohammad Hosseinabady, Jose Nunez-Yanez, J. Núñez-Yáñez, 2020, PARMA-DITAM@HiPEAC.

Energy efficient Reconfigurable Computing with Adaptive Voltage and Logic scaling

José L. Núñez-Yáñez, J. Núñez-Yáñez, 2014, CARN.

Dynamic Voltage Scaling in a FPGA-Based System-on-Chip

Jiri Gaisler, José L. Núñez-Yáñez, Vassilios A. Chouliaras, 2007, 2007 International Conference on Field Programmable Logic and Applications.

A system-on-chip vector multiprocessor for transmission line modelling acceleration

Yibin Li, V.A. Chouliaras, J.L. Nunez-Yanez, 2005, IEEE Workshop on Signal Processing Systems Design and Implementation, 2005..

A code compression scheme for improving SoC performance

V.A. Chouliaras, J.L. Nunez-Yanez, E.G. Nikolova, 2003, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748).

Measuring Energy Measuring Energy

K. Eder, J. Núñez-Yáñez, Markus Buschhoff, 2017 .

2021). Energy-efficient neural networks with near-threshold processors and hardware accelerators

J. Núñez-Yáñez, Neil Howard, 2021 .

Gigabyte per second streaming lossless data compression hardware based on a configurable variable-geometry CAM dictionary

Jose L Nunez-Yanez, Vassilios Chouliaras, J. Núñez-Yáñez, 2006 .

Parallel multiprocessing and scheduling on the heterogeneous Xeon+FPGA platform

Rafael Asenjo, Angeles Navarro, Francisco Corbera, 2019, The Journal of Supercomputing.

Guest Editorial

Dimitrios S. Nikolopoulos, José L. Núñez-Yáñez, J. M. Moreno, 2015, IET Comput. Digit. Tech..

Enabling accurate modeling of power and energy consumption in an ARM-based System-on-Chip

José L. Núñez-Yáñez, Geza Lore, J. Núñez-Yáñez, 2013, Microprocess. Microsystems.