S. Torii

On-Chip Optical Interconnect

Sunao Torii, Katsuya Furue, Akiko Gomyo, 2009, Proceedings of the IEEE.

On-Chip Optical Interconnect A silicon chip able to optically-perform desired signal interconnections has been bonded to a large-scale integrated silicon chip to provide cost-effective reduction of required interconnection power.

K. Nishi, N. Suzuki, K. Ohashi, 2009 .

Triple-CPU Mobile Application Processor Chip

Naoki Nishi, Junji Sakai, Tatsuya Tokue, 2005 .

Low power architecture and design techniques for mobile handset LSI Medity#8482; M2

T. Ohsawa, S. Torii, T. Tokue, 2008, ASP-DAC '08.

An Area-Effective Datapath Architecture for Embedded Microprocessors and Scalable Systems

Masato Edahiro, Satoshi Matsushita, Sunao Torii, 2001 .

Speculative execution of instructions with data dependence

Atsufumi Shibayama, Satoshi Matsushita, Sunao Torii, 2002 .

A 600MIPS 120mW 70/spl mu/A leakage triple-CPU mobile application processor chip

S. Suzuki, S. Torii, N. Suzuki, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..