G. Guégan

发表

Collapse of MOSFET drain current after soft breakdown

A. Paccagnella, S. Deleonibus, A. Cester, 2003, IEEE Transactions on Device and Materials Reliability.

Coulomb blockade in low-mobility nanometer size Si MOSFET’s

G. Guegan, Marc Sanquer, S. Deleonibus, 2000 .

Operation of short-channel depletion-mode MOS devices at liquid-nitrogen temperature

J. Gautier, G. Guégan, M. Guerin, 1991 .

A 20-nm physical gate length NMOSFET featuring 1.2 nm gate oxide, shallow implanted source and drain and BF2 pockets

G. Guegan, S. Deleonibus, F. Martin, 2000, IEEE Electron Device Letters.

SOI 1T-DRAM cells with variable channel length and thickness: Experimental comparison of programming mechanisms

O. Faynot, T. Ernst, S. Cristoloveanu, 2011 .

On the extraction of the channel current in permeable gate oxide MOSFETs

D. Esseni, P. Palestri, G. Guégan, 2004 .

A methodology to extract the channel current of permeable gate oxide MOSFETs

L. Selmi, D. Esseni, P. Palestri, 2003 .

Ultimate sub-25 nm gate length NMOSFETs transport at 293 and 77 K

F. Balestra, S. Deleonibus, C. Caillat, 2000 .

New floating-body effect in partially depleted SOI pMOSFET due to direct-tunneling current in the partial n+ poly gate

G. Guegan, S. Deleonibus, J. Pretet, 2008, ESSDERC 2008 - 38th European Solid-State Device Research Conference.

Analysis of PD SOI pMOSFET Device Performance Enhancement due to Direct-Tunneling Current in the Partial n+ Poly Gate

S. Deleonibus, R. Gwoziecki, G. Gouget, 2007 .

Field mapping of focused ion beam prepared semiconductor devices by off-axis and dark field electron holography

G. Guégan, P. Rivallin, E. Robin, 2013 .

Half-Micrometer N-MOS Technology for Gigabit Logic

J. Gautier, G. Reimbold, G. Guégan, 1988, ESSDERC '88: 18th European Solid State Device Research Conference.

Two-band tunneling currents in metal-oxide-semiconductor capacitors at the transition from direct to Fowler–Nordheim tunneling regime

S. Okhonin, P. Fazan, S. Deleonibus, 1999 .

Comparison of ultra-thin gate dielectrics for 0.1 mm MOS devices

F. Benistant, F. Martin, G. Guégan, 1995 .

Silicon single electron transistors with SOI and MOSFET structures: the role of access resistances

S. Deleonibus, D. Fraboulet, G. Guégan, 2003 .

Coulomb oscillations in 100 nm and 50 nm CMOS devices

G. Guegan, S. Deleonibus, M. Sanquer, 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

Coulomb blockade and transport spectroscopy in short Si:MOSFET

S. Deleonibus, G. Guégan, M. Sanquer, 1999, Annalen der Physik.

Towards the limits of conventional MOSFETs: case of sub 30 nm NMOS devices

G. Guegan, Marc Sanquer, S. Deleonibus, 2004 .

Re-examination of indium implantation for a low power 0.1 /spl mu/m technology

T. Skotnicki, F. Benistant, M. Heitzmann, 1995, Proceedings of International Electron Devices Meeting.

Double SiGe:C diffusion barrier channel 40nm CMOS with improved short-channel performances

A. Toffoli, J. Cluzel, J. Hartmann, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Static and high frequency modelling of vertical channel mos transistor (V.MOS)

P. Rossel, G. Guégan, H. Martinot, 1978 .

Two-Band Tunneling Currents and Stress-Induced Leakage in Ultra-Thin SiO 2 Films

S. Okhonin, P. Fazan, S. Deleonibus, 1999 .

Evidence of Reduced Self Heating with Partially Depleted SOI MOSFET Scaling

S. Deleonibus, R. Gwoziecki, G. Gouget, 2006 .

Low temperature operation of ultra-thin gate oxide sub-0.1 /spl mu/m MOSFETs

F. Balestra, G. Guégan, B. Crețu, 2002, Proceedings of the 5th European Workshop on Low Temperature Electronics.

Low frequency noise characterization of 0.25 μm Si CMOS transistors

M. Haond, Gerard Ghibaudo, G. Guégan, 1997 .