T. Ogura

A novel cylinder-type MIM capacitor in porous low-k film (CAPL) for embedded DRAM with advanced CMOS logics

Y. Hayashi, H. Shirai, T. Hase, 2010, 2010 International Electron Devices Meeting.

1.2 nm HfSiON/SiON Stacked Gate Insulators for 65-nm-Node MISFETs

M. Terai, S. Fujieda, T. Tatsumi, 2005 .

Low-cost Cu Interconnects Using Direct Patterning Process (DPP) of Photo-sensitive MSZ with Low-k, Bottom Anti-reflective layer

Y. Hayashi, T. Ogura, M. Tada, 2002 .

Sub-10-nm-Scale Lithography Using p-chloromethyl-methoxy-calix[4]arene Resist

Masahiko Ishida, Jun-ichi Fujita, Yukinori Ochiai, 2003 .

Performance of new E-beam lithography system JBX-9300FS

T. Mogami, T. Ogura, M. Narihiro, 2000 .

Suppression of Charges in Al~2O~3 Gate Dielectric and Improvement of MOSFET Performance by Plasma Nitridation

Toru Tatsumi, Satoshi Kamiyama, T. Iwamoto, 2004 .

Breakdown Mechanisms and Lifetime Prediction for 90-nm-Node Low-Power HfSiON/SiO2 CMOSFETs

M. Terai, S. Kotsuji, S. Fujieda, 2004 .