X. Qi

Impact of on-chip inductance on power distribution network design for nanometer scale integrated circuits

Kaustav Banerjee, Navin Srivastava, Xiaoning Qi, 2005, Sixth international symposium on quality electronic design (isqed'05).

A fast 3D modeling approach to electrical parameters extraction of bonding wires for RF circuits

Xiaoning Qi, T. Arnborg, Robert W. Dutton, 2000 .

Interconnect Parasitic Extraction of Resistance, Capacitance, and Inductance

Robert W. Dutton, Xiaoning Qi, R. Dutton, 2003 .

A high-PSR transient-enhanced output-capacitorless CMOS low-dropout regulator for SoC applications

Jinguang Jiang, Weilin Xu, Gaofeng Wang, 2011 .

Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance in nanometer technologies

Kishore Singhal, Xiaoning Qi, Alex Gyure, 2006, GLSVLSI '06.

On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation

Gaofeng Wang, Robert W. Dutton, Zhiping Yu, 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

High-frequency characterization of on-chip digital interconnects

Robert W. Dutton, Mark Horowitz, Xiaoning Qi, 2002, IEEE J. Solid State Circuits.