Alper Cabuk

Fully Integrated 94-GHz Dual-Polarized TX and RX Phased Array Chipset in SiGe BiCMOS Operating up to 105 °C

Jean-Olivier Plouchart, Mark Yeck, Alberto Valdes-Garcia, 2018, IEEE Journal of Solid-State Circuits.

An Energy-Aware CMOS Receiver Front End for Low-Power 2.4-GHz Applications

Alper Cabuk, Kiat Seng Yeo, Chirn Chye Boon, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

Design of multiband CMOS mixers for low-voltage low-power applications

Alper Cabuk, 2002 .

A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole

Alper Cabuk, Kiat Seng Yeo, Chirn Chye Boon, 2010, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip.

A fully-integrated 94-GHz 32-element phased-array receiver in SiGe BiCMOS

Jean-Olivier Plouchart, Mark Yeck, Alberto Valdes-Garcia, 2017, 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).

A 52 GHz VCO with low phase noise implemented in SiGe BiCMOS technology

Alper Cabuk, Kiat Seng Yeo, Jianguo Ma, 2003, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings..

A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers

Yang Lu, Alper Cabuk, Kiat Seng Yeo, 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.