Adam Teman

发表

Near-threshold 40nm Supply Feedback C-element

Alexander Fish, Rostislav Dobkin, Idan Schwartz, 2011, 2011 3rd Asia Symposium on Quality Electronic Design (ASQED).

193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing

Luca Benini, Fabien Clermidy, Davide Rossi, 2016, 2016 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS XIX).

A low-cost low-power non-volatile memory for RFID applications

Alexander Fish, Yakov Roizin, Evgeny Pikhay, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Ultra-low power subthreshold flip-flop design

Orly Yadid-Pecht, Adam Teman, Alexander Fish, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Multipliers-Driven Perturbation of Coefficients for Low-Power Operation in Reconfigurable FIR Filters

Philippe Flatresse, Adam Teman, Andrea Bonetti, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

TEMPO: Thermal-Efficient Management of Power in High-Throughput Network Switches

Adam Teman, Tom Munk, Hillel Kugler, 2019, 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).

A 588-Gb/s LDPC Decoder Based on Finite-Alphabet Message Passing

Gerald Matz, Alexios Balatsoukas-Stimming, Michael Meidlinger, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Novel Bitcells for Scaled CMOS Nodes and Soft Error Tolerance

Alexander Fish, Andreas Burg, Pascal Meinerzhagen, 2018 .

Improving Energy-Efficiency in Dynamic Memories Through Retention Failure Detection

Adam Teman, Robert Giterman, Roman Golman, 2019, IEEE Access.

Embedded Memories: Introduction

Alexander Fish, Andreas Burg, Pascal Meinerzhagen, 2018 .

A Minimum Leakage Quasi-Static RAM Bitcell

Alexander Fish, Adam Teman, Omer Cohen, 2011 .

Replica Technique for Adaptive Refresh Timing of Gain-Cell-Embedded DRAM

Andreas Peter Burg, Alexander Fish, Pascal Andreas Meinerzhagen, 2014, IEEE Transactions on Circuits and Systems II: Express Briefs.

Exploration of Sub-VT and Near-VT 2T Gain-Cell Memories for Ultra-Low Power Applications under Technology Scaling

Alexander Fish, Andreas Burg, Adam Teman, 2013 .

Single event upset mitigation in low power SRAM design

Alexander Fish, Adam Teman, Lior Atias, 2014, 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel (IEEEI).

A Low-Power Low-Cost 24 GHz RFID Tag With a C-Flash Based Embedded Memory

Samuel Jameson, Eran Socher, Alexander Fish, 2014, IEEE Journal of Solid-State Circuits.

Configurable Multi-Port Dynamic Bitcell with Internal Refresh Mechanism

Adam Teman, Robert Giterman, Roman Golman, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

A 13T radiation hardened SRAM bitcell for low-voltage operation

Alexander Fish, Adam Teman, Lior Atias, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

A Low-Power DCVSL-Like GIDL-Free Voltage Driver for Low-Cost RFID Nonvolatile Memory

Alexander Fish, Yakov Roizin, Evgeny Pikhay, 2013, IEEE Journal of Solid-State Circuits.

Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories

Andreas Peter Burg, Georgios Karakonstantis, Pascal Andreas Meinerzhagen, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications

Adam Teman, Robert Giterman, Lior Atias, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI

Luca Benini, Davide Rossi, Andreas Peter Burg, 2015, The 20th Asia and South Pacific Design Automation Conference.

4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes

Andreas Peter Burg, Alexander Fish, Pascal Andreas Meinerzhagen, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Power, Area, and Performance Optimization of Standard Cell Memory Arrays Through Controlled Placement

Luca Benini, Davide Rossi, Andreas Peter Burg, 2016, TODE.

A 5-Transistor Ternary Gain-Cell eDRAM with Parallel Sensing

Adam Teman, Robert Giterman, Or Maltabashi, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Synthesis of Dual Mode Logic

Alexander Fish, Itamar Levi, Adam Teman, 2016, Integr..

Improved Read Access in GC-eDRAM Memory by Dual-Negative Word-Line Technique

Adam Teman, Robert Giterman, Roman Golman, 2020, ISCAS.

An 800 Mhz mixed-VT 4T gain-cell embedded DRAM in 28 nm CMOS bulk process for approximate computing applications

Andreas Peter Burg, Alexander Fish, Elad Mentovich, 2017, ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference.

A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability

Alexander Fish, Adam Teman, Anatoli Mordakhay, 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

A process compensated gain cell embedded-DRAM for ultra-low-power variation-aware design

Andreas Peter Burg, Alexander Fish, Pascal Andreas Meinerzhagen, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

A soft error tolerant 4T gain-cell featuring a parity column for ultra-low power applications

Alexander Fish, Adam Teman, Robert Giterman, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Aggressive Technology and Voltage Scaling (Down to the Subthreshold Domain)

Andreas Burg, Pascal Meinerzhagen, Adam Teman, 2018 .

An overlap-contention free true-single-phase clock dual-edge-triggered flip-flop

Andreas Peter Burg, Andrea Bonetti, Adam Teman, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

GC-eDRAM with Body-Bias Compensated Readout and Error Detection in 28nm FD-SOI

Andrea Bonetti, Andreas Burg, Adam Teman, 2020, ISCAS.

Hybrid GC-eDRAM/SRAM Bitcell for Robust Low-Power Operation

Adam Teman, Robert Giterman, Pascal Meinerzhagen, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

A low-power correlator for wakeup receivers with algorithm pruning through early termination

Andreas Peter Burg, Paul N. Whatmough, Jeremy Constantin, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Retention Time Modeling: The Key to Low-Power GC-eDRAMs

Alexander Fish, Andreas Burg, Pascal Meinerzhagen, 2018 .

The Impact of Body Biasing on the Gain-Cell Memories: A Silicon Proof

A. Burg, Alexander Fish, Pascal Meinerzhagen, 2013 .

Functionality and stability analysis of a 400 mV quasi-static RAM (QSRAM) bitcell

Alexander Fish, Adam Teman, Anatoli Mordakhay, 2013, Microelectron. J..

Conventional GC-eDRAMs Scaled to Near-Threshold Voltage (NTV)

Andreas Burg, Pascal Meinerzhagen, Adam Teman, 2018 .

Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip

Alexander Fish, Andreas Burg, Pascal Meinerzhagen, 2017 .

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andrea Bonetti, Andreas Burg, Adam Teman, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

DynOR: A 32-bit microprocessor in 28 nm FD-SOI with cycle-by-cycle dynamic clock adjustment

Andreas Peter Burg, Andrea Bonetti, Lorenz Schmid, 2016, ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference.

A Fast Modular Method for True Variation-Aware Separatrix Tracing in Nanoscaled SRAMs

Adam Teman, Roman Visotsky, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM With Over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI

Alexander Fish, Andreas Burg, Adam Teman, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 11.5pW/bit 400mV 5T gain-cell eDRAM for ULP applications in 28nm FD-SOI

Alexander Fish, Adam Teman, Robert Giterman, 2017, 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

GC-eDRAM With Body-Bias Compensated Readout and Error Detection in 28-nm FD-SOI

Andreas Burg, Andrea Bonetti, Adam Teman, 2019, IEEE Transactions on Circuits and Systems II: Express Briefs.

Gain-Cell Embedded DRAM-Based Physical Unclonable Function

Yoav Weizman, Adam Teman, Robert Giterman, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 14.3pW Sub-Threshold 2T Gain-Cell eDRAM for Ultra-Low Power IoT Applications in 28nm FD-SOI

Alexander Fish, Adam Teman, Robert Giterman, 2018, 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Live Demonstration: An 800 Mhz Gain-Cell Embedded DRAM in 28 nm CMOS Bulk Process for Approximate Computing Applications

Alexander Fish, Adam Teman, Robert Giterman, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A GIDL free tunneling gate driver for a low power non-volatile memory array

Alexander Fish, Yakov Roizin, Evgeny Pikhay, 2012, 2012 IEEE International Symposium on Circuits and Systems.

A Low-Voltage Radiation-Hardened 13T SRAM Bitcell for Ultralow Power Space Applications

Alexander Fish, Pascal Andreas Meinerzhagen, Adam Teman, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

State space modeling for sub-threshold SRAM stability analysis

Alexander Fish, Adam Teman, Janna Mezhibovsky, 2012, 2012 IEEE International Symposium on Circuits and Systems.

C$^\text{2}$TIG: Dynamic C$^\text{2}$MOS Design Based on Three-Independent-Gate Field-Effect Transistors

Pierre-Emmanuel Gaillardon, Adam Teman, Daniel Vana, 2020, IEEE Transactions on Nanotechnology.

Single Event Upset Mitigation in Low Power

Alexander Fish, Adam Teman, Lior Atias, 2014 .

Dynamic stability and noise margins of SRAM arrays in nanoscaled technologies

Adam Teman, 2014, 2014 IEEE Faible Tension Faible Consommation.

A 0.65-V, 500-MHz Integrated Dynamic and Static RAM for Error Tolerant Applications

Alexander Fish, Adam Teman, Noa Edri, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Gain-Cell eDRAMs (GC-eDRAMs): Review of Basics and Prior Art

Alexander Fish, Andreas Burg, Pascal Meinerzhagen, 2018 .

Silicon-Proven, Per-Cell Retention Time Distribution Model for Gain-Cell Based eDRAMs

Andreas Peter Burg, Alexander Fish, Pascal Andreas Meinerzhagen, 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Double-Feedback 8T SRAM bitcell for low-voltage low-leakage operation

Adam Teman, Ortal Yona, Afik Vaknin, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Approximate computing with unreliable dynamic memories

Andreas Peter Burg, Georgios Karakonstantis, Adam Teman, 2015, 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS).

Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space

Adam Teman, Robert Giterman, Andrea Bonetti, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

WavePro: Clock-less Wave-Propagated Pipeline Compiler for Low-Power and High-Throughput Computation

Adam Teman, Yehuda Kra, Tzachi Noy, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Mitigating the impact of faults in unreliable memories for error-resilient applications

Andreas Peter Burg, Georgios Karakonstantis, Adam Teman, 2015, 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC).

Novel Bitcells and Assist Techniques for NTV GC-eDRAMs

Alexander Fish, Andreas Burg, Pascal Meinerzhagen, 2018 .

Low-Voltage 96 dB Snapshot CMOS Image Sensor with 4.5 nW Power Dissipation per Pixel

Alexander Fish, Orly Yadid-Pecht, Adam Teman, 2012, Sensors.

High Density GC-eDRAM Design in 16nm FinFET

Adam Teman, Robert Giterman, Amir Shalom, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

Andreas Peter Burg, Andrea Bonetti, Adam Teman, 2017, ACM Trans. Design Autom. Electr. Syst..

Gain-Cell Embedded DRAMs: Modeling and Design Space

Andrea Bonetti, Andreas Burg, Adam Teman, 2020, ISCAS.

Low voltage SRAMs and the scalability of the 9T Supply Feedback SRAM

Alexander Fish, Adam Teman, Janna Mezhibovsky, 2011, 2011 IEEE International SOC Conference.

Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster

Luca Benini, Fabien Clermidy, Davide Rossi, 2017, IEEE Micro.

An 800-MHz Mixed- $V_{\text{T}}$ 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications

Alexander Fish, Elad Mentovich, Andreas Burg, 2018, IEEE Journal of Solid-State Circuits.

Sub-threshold and near-threshold SRAM design

Alexander Fish, Adam Teman, 2010, 2010 IEEE 26-th Convention of Electrical and Electronics Engineers in Israel.

Impact of body biasing on the retention time of gain-cell memories

Alexander Fish, Andreas Burg, Pascal Meinerzhagen, 2013 .

A 250 mV 8 kb 40 nm Ultra-Low Power 9T Supply Feedback SRAM (SF-SRAM)

Alexander Fish, Adam Teman, Omer Cohen, 2011, IEEE Journal of Solid-State Circuits.

Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications

Andreas Peter Burg, Alexander Fish, Pascal Andreas Meinerzhagen, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

WP 2.0: Signoff-Quality Implementation and Validation of Energy-Efficient Clock-Less Wave Propagated Pipelining

Adam Teman, Yehuda Kra, Tzachi Noy, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification pdf

Marco Lanuzza, Leonid Yavits, Adam Teman, 2021, IEEE Access.

4T Gain-Cell Providing Unlimited Availability through Hidden Refresh with 1W1R Functionality

Adam Teman, Roman Golman, Odem Harel, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Refresh Algorithm for Ensuring 100% Memory Availability in Gain-Cell Embedded DRAM Macros

Adam Teman, Robert Giterman, Roman Golman, 2021, IEEE Access.