D. Kania

发表

Influence of A/D quantization in a renewable energy system using a DFT based estimation of grid signal parameters

D. Kania, 2015, 2015 IEEE 15th International Conference on Environment and Electrical Engineering (EEEIC).

Posturographic methods for body posture symmetry assessment

D. Kania, T. Łukaszewicz, Z. Kidoń, 2015 .

Postural symmetry evaluation using phase approximations of the follow-up CoP trajectories

D. Kania, T. Łukaszewicz, Z. Kidoń, 2020, Computer methods in biomechanics and biomedical engineering.

Technology mapping oriented to adaptive logic modules

D. Kania, M. Kubica, 2023, Bulletin of the Polish Academy of Sciences Technical Sciences.

Comparison of synthesis strategies in terms of switching activity

D. Kania, M. Kubica, A. Opara, 2022, INTERNATIONAL CONFERENCE OF COMPUTATIONAL METHODS IN SCIENCES AND ENGINEERING ICCMSE 2021.

Decomposition strategy aimed at minimizing power consumption

D. Kania, M. Kubica, A. Opara, 2022, INTERNATIONAL CONFERENCE OF COMPUTATIONAL METHODS IN SCIENCES AND ENGINEERING ICCMSE 2021.

Logic synthesis for FPGAs based on cutting of BDD

Adam Opara, Dariusz Kania, Marcin Kubica, 2017, Microprocess. Microsystems.

Decomposition of multi-output functions oriented to configurability of logic blocks

Marcin Kubica, Dariusz Kania, D. Kania, 2017 .

Synthesis of FSMs

Robert Czerwinski, Dariusz Kania, D. Kania, 2013 .

State minimization by means of incompatibility graph coloring

D. Kania, R. Czerwinski, 2011 .

Logic synthesis based on decomposition for CPLDs

Adam Milik, Dariusz Kania, D. Kania, 2010, Microprocess. Microsystems.

The row incompatibility and complement graph - A Novel concept of graph for logic synthesis

D. Kania, Józef Kulisz, 2006 .

Decomposition-based synthesis and its application in PAL-oriented technology mapping

Dariusz Kania, D. Kania, 2000, Proceedings of the 26th Euromicro Conference. EUROMICRO 2000. Informatics: Inventing the Future.

Experimental comparison of MPPT methods for PV systems under dynamic partial shading conditions

S. Leva, F. Grimaccia, A. Dolara, 2016, 2016 IEEE 16th International Conference on Environment and Electrical Engineering (EEEIC).

Decomposition Approaches for Power Reduction

D. Kania, M. Kubica, A. Opara, 2023, IEEE Access.

Logic Synthesis Strategy Oriented to Low Power Optimization

Dariusz Kania, Adam Opara, Marcin Kubica, 2021, Applied Sciences.

Technology Mapping for LUT-Based FPGA

Dariusz Kania, Adam Opara, Marcin Kubica, 2021, Lecture Notes in Electrical Engineering.

Methods of Improving Time Efficiency of Decomposition Dedicated at FPGA Structures and Using BDD in the Process of Cyber-Physical Synthesis

Dariusz Kania, Adam Opara, Marcin Kubica, 2019, IEEE Access.

Strategy of logic synthesis using MTBDD dedicated to FPGA

Adam Opara, Dariusz Kania, Marcin Kubica, 2018, Integr..

Low Power Synthesis of Finite State Machines - State Assignment Decomposition Algorithm

Dariusz Kania, Krzysztof Kajstura, D. Kania, 2018, J. Circuits Syst. Comput..

Logic synthesis of low power FSM for LUT-based FPGA

Marcin Kubica, Krzysztof Kajstura, Dariusz Kania, 2018 .

Area–Oriented Technology Mapping for LUT–Based Logic Blocks

Dariusz Kania, Marcin Kubica, D. Kania, 2017, Int. J. Appl. Math. Comput. Sci..

SMTBDD: New Form of BDD for Logic Synthesis

Marcin Kubica, Dariusz Kania, D. Kania, 2016 .

Finite State Machine Logic Synthesis for Complex Programmable Logic Devices

Dariusz Kania, Robert Czerwinski, D. Kania, 2013 .

Hardware implementation of the LDPC decoder in the FPGA structure

Dariusz Kania, Wojciech Sulek, Mateusz Kuc, 2021 .

Low Power QC-LDPC Decoder Based on Token Ring Architecture

Dariusz Kania, Mateusz Kuc, Wojciech Sulek, 2020, Energies.

FPGA-Oriented LDPC Decoder for Cyber-Physical Systems

Dariusz Kania, Mateusz Kuc, Wojciech Sulek, 2020, Mathematics.

Code construction algorithm for architecture aware LDPC codes with low-error-floor

D. Kania, W. Sulek, D. Kania, 2008, 2008 IEEE Region 8 International Conference on Computational Technologies in Electrical and Electronics Engineering.

A Hardware-Oriented Algorithm for Real-Time Music Key Signature Recognition

Dariusz Kania, Tomasz Łukaszewicz, Paulina Kania, 2021, Applied Sciences.

A Key-Finding Algorithm Based on Music Signature

D. Kania, Paulina Kania, 2019, Archives of Acoustics.

Trajectory of Fifths in Music Data Mining

Dariusz Kania, Paulina Kania, Tomasz Łukaszewicz, 2021, IEEE Access.

Reconfigurable Logic Controller—Direct FPGA Synthesis Approach

D. Kania, A. Milik, M. Kubica, 2021, Applied Sciences.

Binary Decision Diagrams

Dariusz Kania, Adam Opara, Marcin Kubica, 2020, Lecture Notes in Electrical Engineering.

Decomposition time effectiveness for various synthesis strategies dedicated to FPGA structures

Dariusz Kania, Adam Opara, Marcin Kubica, 2016 .

State Assignment and Optimization of Ultra-High-Speed FSMs Utilizing Tristate Buffers

Dariusz Kania, Robert Czerwinski, D. Kania, 2016, ACM Trans. Design Autom. Electr. Syst..

Decomposition-based logic synthesis for PAL-based CPLDs

Adam Opara, Dariusz Kania, D. Kania, 2010, Int. J. Appl. Math. Comput. Sci..

Decomposition of Multioutput Functions Described Using BDD

Dariusz Kania, Adam Opara, Marcin Kubica, 2020 .

A novel non-disjunctive method for decomposition of CPLDs

A. Opara, D. Kania, D. Kania, 2009 .