E. Demircan

Chip‐Level Electromigration Reliability for Cu Interconnects

M. Gall, V. Zolotov, B. Boeck, 2004 .

Model based method for electro-migration stress determination in interconnects

E. Demircan, M. Shroff, 2014, 2014 IEEE International Reliability Physics Symposium.

Fast Electromigration Stress Evolution Analysis for Interconnect Trees Using Krylov Subspace Method

Sheldon X.-D. Tan, Ertugrul Demircan, Zeyu Sun, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Reticle enhancement technology: implications and challenges for physical design

Ruiqi Tian, R. Wang, C. Yuan, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

A de-embedding technique for interconnects

Jiming Song, Feng Ling, G. Flynn, 2001, IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565).

Voltage-based electromigration immortality check for general multi-branch interconnects

Sheldon X.-D. Tan, Taeyoung Kim, Zeyu Sun, 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Integration of SiCN as a low /spl kappa/ etch stop and Cu passivation in a high performance Cu/low /spl kappa/ interconnect

Ertugrul Demircan, Larry Zhao, Steve Park, 2002, Proceedings of the IEEE 2002 International Interconnect Technology Conference (Cat. No.02EX519).

Effects of Interconnect Process Variations on Signal Integrity

Ertugrul Demircan, E. Demircan, 2006, 2006 IEEE International SOC Conference.