Grzegorz Mrugalski

发表

Cellular automata-based test pattern generators with phase shifters

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

TestExpress - New Time-Effective Scan-Based Deterministic Test Paradigm

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2015, 2015 IEEE 24th Asian Test Symposium (ATS).

Scan Test Bandwidth Management for Ultralarge-Scale System-on-Chip Architectures

Nilanjan Mukherjee, Yan Dong, Janusz Rajski, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Test Sequence-Optimized BIST for Automotive Applications

Nilanjan Mukherjee, Janusz Rajski, Lukasz Rybak, 2020, 2020 IEEE European Test Symposium (ETS).

Low Power Test Compression with Programmable Broadcast-Based Control

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2014, 2014 IEEE 23rd Asian Test Symposium.

Embedded deterministic test for low cost manufacturing test

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2002, Proceedings. International Test Conference.

Fault Diagnosis With Convolutional Compactors

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Low power compression of incompatible test cubes

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2010, 2010 IEEE International Test Conference.

High speed ring generators and compactors of test data [logic IC test]

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2003, Proceedings. 21st VLSI Test Symposium, 2003..

2D test sequence generators

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2003, IEEE Design & Test of Computers.

Synthesis of pattern generators based on cellular automata with phase shifters

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

High performance dense ring generators

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2006, IEEE Transactions on Computers.

Diagnosis of Failing Scan Cells through Orthogonal Response Compaction

Janusz Rajski, Jerzy Tyszer, Brady Benware, 2011, ETS.

Trimodal Scan-Based Test Paradigm

Chen Wang, Janusz Rajski, Jerzy Tyszer, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Deterministic Clustering of Incompatible Test Cubes for Higher Power-Aware EDT Compression

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Planar high performance ring generators

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2004, 22nd IEEE VLSI Test Symposium, 2004. Proceedings..

Fault diagnosis in designs with convolutional compactors

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2004, 2004 International Conferce on Test.

Star-EDT: Deterministic On-Chip Scheme Using Compressed Test Patterns

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Ring generators - new devices for embedded test applications

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

EDT channel bandwidth management in SoC designs with pattern-independent test access mechanism

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2011, 2011 IEEE International Test Conference.

Autonomous Scan Patterns for Laser Voltage Imaging

Janusz Rajski, Wu-Tung Cheng, Grzegorz Mrugalski, 2019 .

Fault diagnosis in designs with convolutional compactors

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2004 .

Comparative study of CA-based PRPGs and LFSRs with phase shifters

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).

Scan Chain Diagnosis-Driven Test Response Compactor

Szczepan Urban, Grzegorz Mrugalski, Jakub Janicki, 2020, 2020 IEEE 29th Asian Test Symposium (ATS).

High-Speed Serial Embedded Deterministic Test for System-on-Chip Designs

Janusz Rajski, Nilanjan Mukherjee, Grzegorz Mrugalski, 2014, 2014 IEEE 23rd Asian Test Symposium.

Scan Integrity Tests for EDT Compression

Janusz Rajski, Wu-Tung Cheng, Grzegorz Mrugalski, 2020, IEEE Design & Test.

X-Tolerant Tunable Compactor for In-System Test

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2020, 2020 IEEE International Test Conference (ITC).

Low-Power Scan Operation in Test Compression Environment

Janusz Rajski, Jerzy Tyszer, Xijiang Lin, 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Test Time Reduction in EDT Bandwidth Management for SoC Designs

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

X-Press Compactor for 1000x Reduction of Test Data

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2006, 2006 IEEE International Test Conference.

Test generator with preselected toggling for low power built-in self-test

Benoit Nadeau-Dostie, Janusz Rajski, Jerzy Tyszer, 2012, 2012 IEEE 30th VLSI Test Symposium (VTS).

Bandwidth-aware test compression logic for SoC designs

Janusz Rajski, Grzegorz Mrugalski, Jerzy Tyszer, 2012, 2012 17th IEEE European Test Symposium (ETS).

Reduced ATE Interface for High Test Data Compression

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2011, 2011 Sixteenth IEEE European Test Symposium.

New Test Data Decompressor for Low Power Applications

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Low-Power Programmable PRPG With Test Compression Capabilities

Nilanjan Mukherjee, Benoit Nadeau-Dostie, Janusz Rajski, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2007, IEEE Design & Test of Computers.

Fault Diagnosis in Memory BIST Environment with Non-march Tests

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2011, 2011 Asian Test Symposium.

Low Power Scan Shift and Capture in the EDT Environment

Janusz Rajski, Jerzy Tyszer, Xijiang Lin, 2008, 2008 IEEE International Test Conference.

On using implied values in EDT-based test compression

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

Test response compactor with programmable selector

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

On Deploying Scan Chains for Data Storage in Test Compression Environment

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2013, IEEE Design & Test.

TestResponse Compactor withProgrammable Selector

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2006 .

Ring Generator: An Ultimate Linear Feedback Shift Register

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2011, Computer.

On Compaction Utilizing Inter and Intra-Correlation of Unknown States

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

On Cyclic Scan Integrity Tests for EDT-based Compression

Janusz Rajski, Wu-Tung Cheng, Grzegorz Mrugalski, 2019, 2019 IEEE 37th VLSI Test Symposium (VTS).

Highly X-Tolerant Selective Compaction of Test Responses

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2009, 2009 27th IEEE VLSI Test Symposium.

Erratum to "Test Time Reduction in EDT Bandwidth Management for SoC Designs"

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2014, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Fault Diagnosis with Orthogonal Compactors in Scan-Based Designs

Janusz Rajski, Jerzy Tyszer, Brady Benware, 2011, J. Electron. Test..

Diagnosis with convolutional compactors in presence of unknown states

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2005, IEEE International Conference on Test, 2005..

X-Press: Two-Stage X-Tolerant Compactor With Programmable Selector

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

EDT Bandwidth Management in SoC Designs

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Low power programmable PRPG with enhanced fault coverage gradient

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2012, 2012 IEEE International Test Conference.

Compression based on deterministic vector clustering of incompatible test cubes

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2009, 2009 International Test Conference.

A deterministic BIST scheme based on EDT-compressed test patterns

Janusz Rajski, Jerzy Tyszer, Lukasz Rybak, 2015, 2015 IEEE International Test Conference (ITC).

Low Power Decompressor and PRPG with Constant Value Broadcast

Janusz Rajski, Jerzy Tyszer, Masahiro Takakura, 2011, 2011 Asian Test Symposium.

Low-Power Test Data Application in EDT Environment Through Decompressor Freeze

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Convolutional compaction-driven diagnosis of scan failures

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2005, European Test Symposium (ETS'05).

Linear independence as evaluation criterion for two-dimensional test pattern generators

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2000, Proceedings 18th IEEE VLSI Test Symposium.

New test compression scheme based on low power BIST

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2013, 2013 18th IEEE European Test Symposium (ETS).

Dynamic channel allocation for higher EDT compression in SoC designs

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2010, 2010 IEEE International Test Conference.

Low Power Embedded Deterministic Test

Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, 2007, 25th IEEE VLSI Test Symposium (VTS'07).

Diagnosis of Failing Scan Cells through Orthogonal Response Compaction

Janusz Rajski, Jerzy Tyszer, Brady Benware, 2010, 2011 Sixteenth IEEE European Test Symposium.

Isolation of Failing Scan Cells through Convolutional Test Response Compaction

Chen Wang, Janusz Rajski, Grzegorz Mrugalski, 2007, J. Electron. Test..

LBIST for Automotive ICs with Enhanced Test Generation

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

X-Tolerant Compactor maXpress for In-System Test Applications With Observation Scan

Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.