Srinivasa Rao Vempati

High Quality and Low Loss Millimeter Wave Passives Demonstrated to 77-GHz for SiP Technologies Using Embedded Wafer-Level Packaging Platform (EMWLP)

Jinglin Shi, Teck Guan Lim, Ying Ying Lim, 2010, IEEE Transactions on Advanced Packaging.

Study on mold flow during compression molding for embedded wafer level package (EMWLP) with multiple chips

Srinivasa Rao Vempati, C. T. Chong, Ji Lin, 2012, 2012 IEEE 14th Electronics Packaging Technology Conference (EPTC).

Process and reliability assessment of 200μm-thin embedded wafer level packages (EMWLPs)

Srinivasa Rao Vempati, Chee Houe Khong, Ser Choong Chong, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

Demonstration of high quality and low loss millimeter wave passives on embedded wafer level packaging platform (EMWLP)

John H. Lau, Teck Guan Lim, Ying Ying Lim, 2009, 2009 59th Electronic Components and Technology Conference.

Simultaneous molding and under-filling for void free process to encapsulate fine pitch micro bump interconnections of chip-to-wafer (C2W) bonding in wafer level packaging

Srinivasa Rao Vempati, Lin Bu, Ser Choong Chong, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).

Development of 3-D silicon die stacked package using flip chip technology with micro bump interconnects

John H. Lau, Ying Ying Lim, K. Y. Au, 2009, 2009 59th Electronic Components and Technology Conference.

A novel method to predict die shift during compression molding in embedded wafer level package

Dim-Lee Kwong, Srinivasa Rao Vempati, Kripesh Vaidyanathan, 2009, 2009 59th Electronic Components and Technology Conference.

Chip to wafer bonding for three-dimensional integration of copper low K Chip by stacking process

Srinivasa Rao Vempati, Ser Choong Chong, Daniel Ismael Cereno, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).