Witold Machowski

发表

Reference Clock Phase Shifter with Direct Digital Synthesis Circuit

Jacek Kołodziej, Przemysław Krehlik, Michał Łokcewicz, 2018, 2018 International Conference on Signals and Electronic Systems (ICSES).

An analog dual delay locked loop using coarse and fine programmable delay elements

Jacek Jasielski, Witold Machowski, Stanislaw W. Kuta, 2013, Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013.

Low voltage, low power analog multipliers based on CMOS inverters

Jacek Jasielski, Witold Machowski, 2011, Proceedings of the 18th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2011.

Hybrid LBDD PWM modulator for digital class-BD audio amplifier based on STM32F407VGT6 microcontroller and analog DLL

Jacek Jasielski, Witold Machowski, Stanislaw W. Kuta, 2015, 2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES).

Low voltage, low power CMOS inverter based filter for NSDM codec

Witold Machowski, Juliusz Godek, 2009, 2009 MIXDES-16th International Conference Mixed Design of Integrated Circuits & Systems.

The Influence of Power Lines Non-Homogeneity on PLC Data Transmission Protocols Efficacy

Witold Machowski, Jacek Stepien, Adam Tarnawski, 2018, 2018 14th Selected Issues of Electrical Engineering and Electronics (WZEE).

Recovery synchronization in ANS-DM demodulator

Ryszard Golanski, Witold Machowski, Juliusz Godek, 2016, 2016 International Conference on Signals and Electronic Systems (ICSES).

Quarter-square analog four-quadrant multiplier based on CMOS invertes and using low voltage high speed control circuits

Jacek Jasielski, Witold Machowski, Wojciech Kolodziejski, 2010, Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2010.

Hybrid DPWM implementation using coarse and fine programmable ADLL

Jacek Jasielski, Witold Machowski, Stanislaw W. Kuta, 2014, Microelectron. J..

Receiver Originated Noise Immunity of PLC OSGP Protocol

Witold Machowski, Jacek Stepien, Adam Tarnawski, 2018, 2018 14th Selected Issues of Electrical Engineering and Electronics (WZEE).

Broadband quarter-square 4Q analog multiplier based on CMOS inverters

Jacek Jasielski, Witold Machowski, Wojciech Kolodziejski, 2010, ICSES 2010 International Conference on Signals and Electronic Circuits.

Proposition of the full synchronization method for transmission systems with variable duration of bits

Ryszard Golanski, Witold Machowski, Juliusz Godek, 2016, 2016 International Conference on Signals and Electronic Systems (ICSES).

Double edge class BD hybrid DPWM implementation using linearized LBDD algorithm

Ireneusz Brzozowski, Jacek Jasielski, Witold Machowski, 2014, 2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES).

Mobile user tracking system with ZigBee

Witold Machowski, Jacek Kolodziej, Jacek Stepien, 2016, Microprocess. Microsystems.

Class-BD audio amplifiers with common-mode free output

Jacek Jasielski, Witold Machowski, Stanislaw W. Kuta, 2016, 2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems.

Four-quadrant CMOS transconductance multiplier operating at low voltage and high-speed

Jacek Jasielski, Witold Machowski, Wojciech Kolodziejski, 2010, Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2010.

Hybrid active pixel sensors and SOI inspired option

Krzysztof Kucharski, Daniel Tomaszewski, P. Grabiec, 2003 .