Jae Woo Lee

发表

Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-k last devices and enabling a simplified scalable CMOS integration scheme

S. Chew, T. Schram, K. Devriendt, 2014 .

Negative Capacitance FinFET With Sub-20-mV/decade Subthreshold Slope and Minimal Hysteresis of 0.48 V

C. Shin, Jae Woo Lee, Eunah Ko, 2017, IEEE Electron Device Letters.

1/f noise analysis of replacement metal gate bulk p-type fin field effect transistor

R. Ritzenthaler, N. Horiguchi, A. Thean, 2013 .

Sidewall crystalline orientation effect of post-treatments for a replacement metal gate bulk fin field effect transistor.

N. Horiguchi, A. Thean, A. Veloso, 2013, ACS applied materials & interfaces.

Low-Frequency-Noise-Based Oxide Trap Profiling in Replacement High-κ/Metal-Gate pMOSFETs

N. Horiguchi, A. Veloso, V. Paraschiv, 2014 .

Low Frequency Noise Analysis for Post-Treatment of Replacement Metal Gate

N. Horiguchi, A. Thean, A. Veloso, 2013, IEEE Transactions on Electron Devices.

Assessment of the Impact of Inelastic Tunneling on the Frequency-Depth Conversion from Low-Frequency Noise Spectra

Cor Claeys, Eddy Simoen, Jae Woo Lee, 2014, IEEE Transactions on Electron Devices.

Comparison of Temperature Dependent Carrier Transport in FinFET and Gate-All-Around Nanowire FET

H. Mertens, R. Ritzenthaler, N. Horiguchi, 2020, Applied Sciences.

(Invited) Replacement Metal Gate/High-k Last Technology for Aggressively Scaled Planar and FinFET-Based Devices

Naoto Horiguchi, Eddy Simoen, Anabela Veloso, 2014 .

Sidewall crystalline orientation effect of post-treatments for a replacement metal gate bulk fin field effect transistor.

N. Horiguchi, A. Thean, A. Veloso, 2013, ACS applied materials & interfaces.