A. V. Ammel

发表

Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-k last devices and enabling a simplified scalable CMOS integration scheme

S. Chew, T. Schram, K. Devriendt, 2014 .

Growth evolution and characterization of ultra-thin CoGe2 films synthesized via a catalytic solid–vapour reaction technique

K. Opsomer, C. Adelmann, M. Schaekers, 2014 .

Photoconductivity self-recovery effect and self-annealing behaviour of undoped A-Si:H by homogeneous chemical vapour deposition

R. Mertens, A. V. Ammel, J. Nijs, 1989 .

Etch process development for FLARETM for dual damascene architecture using a N2/O2 plasma

G. Beyer, K. Maex, H. Struyf, 1999 .

Preparation of hydrogenated amorphous-silicon with tunable gap by homogeneous chemical vapor-deposition

R. Mertens, A. V. Ammel, J. Nijs, 1990 .

Spectroscopic ellipsometry of strained Si1-x Gex layers

M. Caymax, A. V. Ammel, J. Kuběna, 1993 .

Effective Work Function Engineering for Aggressively Scaled Planar and Multi-Gate Fin Field-Effect Transistor-Based Devices with High-k Last Replacement Metal Gate Technology

S. Chew, T. Schram, K. Devriendt, 2013 .

W versus Co–Al as Gate Fill-Metal for Aggressively Scaled Replacement High-k/Metal Gate Devices for (Sub-)22 nm Technology Nodes

Tom Schram, Anabela Veloso, S. A. Chew, 2013 .

Low temperature selective growth of epitaxial Si and Si1-xGex layers from SiH4 and GeH4 in an ultrahigh vacuum, very low pressure chemical vapour deposition reactor: kinetics and possibilities

Johan Nijs, Robert Mertens, Jozef Poortmans, 1994 .

The use of amorphous and microcrystalline silicon for silicon heterojunction bipolar transistors

R. Mertens, A. V. Ammel, J. Nijs, 1986 .

Influences of trace metal impurities on the thermal quenching of photoluminescence in hydrogenated amorphous silicon by homogeneous chemical vapor deposition

R. Mertens, W. Vandervorst, A. V. Ammel, 1990 .

Homogeneous Gas Phase Nucleation of Silane in Low Pressure Chemical Vapor Deposition (LPCVD)

R. Mertens, A. V. Ammel, J. Nijs, 1988 .

Effect of the dielectric thickness and the metal deposition technique on the mobility for HfO 2 /TaN NMOS devices

T. Schram, L. Ragnarsson, M. Heyns, 2005 .

Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration

E. Beyne, E. Sleeckx, W. Dehaene, 2011 .

Optimization of SI-Wafer Cleaning and the use of Buffer-Layers for Epitaxial Growth of Sige-Layers by VLPCVD at T = 650 C

M. Caymax, W. Vandervorst, A. V. Ammel, 1992 .

On the thermal stability of physically-vapor-deposited diffusion barriers in 3D Through-Silicon Vias during IC processing

E. Beyne, A. Redolfi, K. Croes, 2013 .