Chen Zhang

发表

High-Speed Planar GaAs Nanowire Arrays with fmax > 75 GHz by Wafer-Scale Bottom-up Growth.

Xiuling Li, Xin Miao, K. Chabak, 2015, Nano letters.

III–V Nanowire Transistors for Low-Power Logic Applications: A Review and Outlook

Xiuling Li, Xiuling Li, Chen Zhang, 2016, IEEE Transactions on Electron Devices.

Device Architectures for Enhanced Photon Recycling in Thin‐Film Multijunction Solar Cells

Myoung Hee Yun, Jin Young Kim, Eli Yablonovitch, 2015 .

Quenched phonon drag in silicon nanowires reveals significant effect in the bulk at room temperature.

Xiuling Li, P. Ferreira, Chen Zhang, 2015, Nano letters.

InAs Planar Nanowire Gate-All-Around MOSFETs on GaAs Substrates by Selective Lateral Epitaxy

Parsian K. Mohseni, Xiuling Li, Xiuling Li, 2015, IEEE Electron Device Letters.

A Distributive-Transconductance Model for Border Traps in III–V/High-k MOS Capacitors

Xiuling Li, P. Ye, Min Xu, 2013, IEEE Electron Device Letters.

III-V Junctionless Gate-All-Around Nanowire MOSFETs for High Linearity Low Power Applications

Xiuling Li, K. Chabak, Chen Zhang, 2014, IEEE Electron Device Letters.

RF performance of 3D III-V nanowire T-Gate HEMTs grown by VLS method

Xiuling Li, Xin Miao, K. Chabak, 2014, 72nd Device Research Conference.

Sub-100 nm Si nanowire and nano-sheet array formation by MacEtch using a non-lithographic InAs nanowire mask

Jae Cheol Shin, Xiuling Li, Xiuling Li, 2012, Nanotechnology.

Pathological Diagnosis and Analysis of Four Cases of Melanoma in Yunan Black Pigs

Chen Zhang, Mengmeng Liu, R. Qiao, 2020 .

Lattice-mismatched semiconductor heterostructures

Sang June Cho, Jian Shi, Dong Liu, 2018, 1812.10225.

Multi-scale model of effects of roughness on the cohesive strength of self-assembled monolayers

N. Sottos, P. Geubelle, Chen Zhang, 2017, International Journal of Fracture.

Effects of interface roughness on cohesive strength of self-assembled monolayers

Martha E. Grady, N. Sottos, P. Geubelle, 2017 .

Monolithic lateral p–n junction GaAs nanowire diodes via selective lateral epitaxy

Xiuling Li, Chen Zhang, P. Mohseni, 2021, Nanotechnology.

Site-controlled VLS growth of planar nanowires: yield and mechanism.

Xin Miao, Xiuling Li, Xiuling Li, 2014, Nano letters.

A review of III–V planar nanowire arrays: selective lateral VLS epitaxy and 3D transistors

Xiuling Li, Xin Miao, K. Chabak, 2017 .

Monolithic barrier-all-around high electron mobility transistor with planar GaAs nanowire channel.

Xiuling Li, Xin Miao, Chen Zhang, 2013, Nano letters.

RF Performance of Planar III–V Nanowire-Array Transistors Grown by Vapor–Liquid–Solid Epitaxy

Xiuling Li, Xin Miao, K. Chabak, 2015, IEEE Electron Device Letters.

A High-Efficiency Si Nanowire Array/Perovskite Hybrid Solar Cell

X. Ren, Xia Zhang, Chen Zhang, 2017, Nanoscale Research Letters.