S. Sarangi

An Analytical Model for the Threshold Voltage of Short-Channel Double-Material-Gate (DMG) MOSFETs with a Strained-Silicon (s-Si) Channel on Silicon-Germanium (SiGe) Substrates

Sarvesh Dubey, Pramod Kumar Tiwari, Abirmoya Santra, 2013 .

An analytical surface potential modeling of fully-depleted symmetrical double-gate (DG) strained-Si MOSFETs including the effect of interface charges

P. Tiwari, S. Bhushan, S. Dubey, 2013, 2013 Students Conference on Engineering and Systems (SCES).

AN ANALYTICAL SURFACE POTENTIAL MODEL FOR STRAINED-Si ON SILICON- GERMANIUM MOSFET INCLUDING THE EFFECTS OF INTERFACE CHARGES

P. Tiwari, S. Jit, S. Bhushan, 2012 .

A rigorous simulation based study of gate misalignment effects in gate engineered double-gate (DG) MOSFETs

P. Tiwari, S. Jit, S. Bhushan, 2013 .

A 7.1-GHz 0.7-mW Programmable Counter With Fast EOC Generation in 65-nm CMOS

T. K. Bhattacharyya, Indranil Som, Santunu Sarangi, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.