K. Rajendran

Comparative analysis of minimum surface potential and location of barrier peaks in various Si MOSFET devices

G. Samudra, K. Rajendran, 2000 .

Modelling of transconductance-to-current ratio (gm/ID) analysis on double-gate SOI MOSFETs

G. Samudra, K. Rajendran, 2000 .

Scaling Parameter Dependent Drain Induced Barrier Lowering Effect in Double-Gate Silicon-on-Insulator Metal-Oxide-Semiconductor Field Effect Transistor

G. Samudra, K. Rajendran, 1999 .

Measurement and simulation of boron diffusion in strained Si1−xGex epitaxial layers with a linearly graded germanium profile

W. Schoenmaker, K. Rajendran, 2001 .

Simulation of boron diffusion in strained Si/sub 1-x/Ge/sub x/ epitaxial layers

S. Decoutere, W. Schoenmaker, K. Rajendran, 2000, 2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502).

Measurement and simulation of boron diffusion in strained Si/sub 1-x/Ge/sub x/ epitaxial layers

S. Decoutere, R. Loo, M. Caymax, 2001 .

Measurement and Simulation of Boron Diffusivity in Strained Si1 -xGex Epitaxial Layers

Wim Schoenmaker, K. G. Rajendran, W. Schoenmaker, 2001, VLSI Design.

Modeling of minimum surface potential and sub-threshold swing for grooved-gate MOSFETs

W. Schoenmaker, K. Rajendran, 2001 .

A simple modelling of device speed in double-gate SOI MOSFETs

Ganesh S. Samudra, K Rajendran, G. Samudra, 2000 .

Studies of boron diffusivity in strained Si1−xGex epitaxial layers

W. Schoenmaker, K. Rajendran, 2001 .