W. Toms

QDI Implementations of Boolean Graphs

W. Toms, W. B. Toms, 2003 .

Self-Timed Multi-Operand Addition

P. Balasubramanian, D. A. Edwards, P. Balasubramanian, .

Energy-Efficient Encoding for High-Speed Serial Interfaces

W. Toms, V. Pavlidis, E. Maragkoudaki, 2022, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Redundant Logic Insertion and Latency Reduction in Self-Timed Adders

P. Balasubramanian, William B. Toms, David A. Edwards, 2012, VLSI Design.

A Complete Synthesis Method for Block-Level Relaxation in Self-Timed Datapaths

William B. Toms, David A. Edwards, D. A. Edwards, 2010, 2010 10th International Conference on Application of Concurrency to System Design.

M-of-N Code Decomposition for Indicating Combinational Logic

William B. Toms, David A. Edwards, D. A. Edwards, 2010, 2010 IEEE Symposium on Asynchronous Circuits and Systems.

Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks

Doug A. Edwards, William B. Toms, D. Edwards, 2009, 2009 15th IEEE Symposium on Asynchronous Circuits and Systems.

Synthesising heterogeneously encoded systems

William B. Toms, David A. Edwards, Andrew Bardsley, 2006, 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'06).

Efficient synthesis of speed-independent combinational logic circuits

D.A. Edwards, W.B. Toms, D. A. Edwards, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

eTeak: A Data-driven Synchronous Elastic Synthesiser

Mahdi Jelodari Mamaghani, Jim Garside, Will Toms, 2013, ACSD 2013.

Architectural support for task scheduling: hardware scheduling for dataflow on NUMA systems

P. Faraboschi, M. Luján, I. Watson, 2015, The Journal of Supercomputing.

Delay-insensitive, point-to-point interconnect using m-of-n codes

William B. Toms, William John Bainbridge, David A. Edwards, 2003, Ninth International Symposium on Asynchronous Circuits and Systems, 2003. Proceedings..