N. Sudha

Improving Performance Through Novel Enhanced Hierarchial Attention Neural Network

N. Parthiban, N. Sudha, 2020 .

Principal Component Neural Networks for Applications in Signal Processing Master of Science

N. Sudha, 2022 .

High Speed and Low Power Dynamic Latched Comparator for Air Craft Application

N. Sudha, V. Nayak, F. Basha, 2012 .

High Speed and Low Power Dynamic Latched Comparator for PTL Circuit Applications

N. Sudha, V. Nayak, Suneel Mudunuru, 2012 .

VLSI Implementation of Densely Packed Decimal Converter to and from Binary Coded Decimal using Reversible Logic Gates

N. Sudha, V. Nayak, Shaik Rahil Hussain, 2012 .

Some Properties of Touching Distances for Polygons and Polyhedra

K. Sridharan, N. Sudha, C. Subramanian, 1998 .

Real-Time SURF-Based Video Stabilization System for an FPGA-Driven Mobile Robot

K. Sridharan, N. Sudha, Tahiyah Nou Shene, 2016, IEEE Transactions on Industrial Electronics.

A parallel skeletonization algorithm and its VLSI architecture

Sukumar Nandi, N. Sudha, N. Sudha, 1998, Proceedings. Fifth International Conference on High Performance Computing (Cat. No. 98EX238).

A pipelined array architecture for Euclidean distance transformation and its FPGA implementation

N. Sudha, N. Sudha, 2005, Microprocess. Microsystems.