K.S. Chen

Enabling Multiple-Vt Device Scaling for CMOS Technology beyond 7nm Node

Vincent S. Chang, S.H. Wang, J.H. Lu, 2020, 2020 IEEE Symposium on VLSI Technology.

A 7nm CMOS platform technology featuring 4th generation FinFET transistors with a 0.027um2 high density 6-T SRAM cell for mobile SoC applications

C.C. Chen, Shien-Yang Wu, S.Y. Chang, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

A highly manufacturable 28nm CMOS low power platform technology with fully functional 64Mb SRAM using dual/tripe gate oxide process

C.C. Chen, Shien-Yang Wu, S.Y. Chang, 2006, 2009 Symposium on VLSI Technology.