Soo-Bin Lim

A 247 µW 800 Mb/s/pin DLL-Based Data Self-Aligner for Through Silicon via (TSV) Interface

Chulwoo Kim, Hyun-Woo Lee, Junyoung Song, 2012, IEEE Journal of Solid-State Circuits.

An adaptive-bandwidth PLL for avoiding noise interference and DFE-less fast precharge sampling for over 10Gb/s/pin graphics DRAM interface

Chulwoo Kim, Hyun-Woo Lee, Yunsaing Kim, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface

Chulwoo Kim, Hyun-Woo Lee, Yunsaing Kim, 2012, 2012 IEEE International Solid-State Circuits Conference.

A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications

Jinkook Kim, Boram Kim, Seung-Hun Lee, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).