Sonia López

发表

LA FORMULA CIÓN DE PREGUNTAS EN EL AULA DE CLASE: UNA EVIDENCIA DE APRENDIZAJE SIGNIFICATIVO CRÍTICO The formulation of questions in the classroom: evidence of critical meaningful learning

Sonia López, Eliane Angela Veit, Ives Solano Araujo, 2014 .

A phase adaptive cache hierarchy for SMT processors

José Ignacio Hidalgo, David H. Albonesi, Oscar Garnica, 2011, Microprocess. Microsystems.

Improving SMT performance: an application of genetic algorithms to configure resizable caches

José Ignacio Hidalgo, Oscar Garnica, Francisco Fernández, 2009, GECCO '09.

The plausibility of using unmanned aerial vehicles as a serious game for dealing with attention deficit-hyperactivity disorder

Francisco Cervantes, Sonia López, Salvador Cervantes, 2020, Cognitive Systems Research.

Empirical characterization of the latency of long asynchronous pipelines with data-dependent module delays

José Ignacio Hidalgo, Román Hermida, Oscar Garnica, 2004, 12th Euromicro Conference on Parallel, Distributed and Network-Based Processing, 2004. Proceedings..

Power Analysis of HLS-Designed Customized Instruction Set Architectures

Sonia López, Tejaswini Ananthanarayana, Marcin Lukowiak, 2017, 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Performance Modeling of Pipelined Linear Algebra Architectures on FPGAs

Sonia López, Marcin Lukowiak, Matthew Ryan, 2013, ARC.

Mission control: A performance metric and analysis of control logic for pipelined architectures on FPGAs

Christopher A. Wood, Sonia López, Marcin Lukowiak, 2014, 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14).

Rate-Driven Control of Resizable Caches for Highly Threaded SMT Processors

David H. Albonesi, Oscar Garnica, Juan Lanchares, 2007, 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007).

A Parallelizing Matlab Compiler Framework and Run Time for Heterogeneous Systems

Andrew G. Schmidt, Sonia López, Marcin Lukowiak, 2015, 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems.

Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart

José Ignacio Hidalgo, Guadalupe Miñana, Oscar Garnica, 2006, 9th EUROMICRO Conference on Digital System Design (DSD'06).

Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions

José Ignacio Hidalgo, Guadalupe Miñana, Oscar Garnica, 2006, Euro-Par.

A biologically inspired computational model of Moral Decision Making for autonomous agents

Luis-Felipe Rodríguez, Sonia López, Félix F. Ramos Corchado, 2013, 2013 IEEE 12th International Conference on Cognitive Informatics and Cognitive Computing.

Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders

José Ignacio Hidalgo, Guadalupe Miñana, Oscar Garnica, 2007, IET Comput. Digit. Tech..

Designing customized ISA processors using high level synthesis

Sonia López, Tejaswini Ananthanarayana, Marcin Lukowiak, 2015, 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

Enhancing GALS Processor Performance Using Data Classification Based on Data Latency

Oscar Garnica, José Manuel Colmenar, Sonia López, 2004, PATMOS.

Cognitive Process of Moral Decision-Making for Autonomous Agents

Luis-Felipe Rodríguez, Sonia López, Félix F. Ramos Corchado, 2013, Int. J. Softw. Sci. Comput. Intell..

A cognitive model of motor planning for virtual creatures

Yingxu Wang, Sonia López, Félix F. Ramos Corchado, 2015, 2015 IEEE 14th International Conference on Cognitive Informatics & Cognitive Computing (ICCI*CC).

A unified hardware/software MPSoC system construction and run-time framework

Matthew French, Andrew G. Schmidt, Sonia López, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Toward ethical cognitive architectures for the development of artificial moral agents

Sonia López, Salvador Cervantes, José-Antonio Cervantes, 2020, Cognitive Systems Research.

A literature review about computational modeling and simulation in physics education in middle and high school levels

Sonia López, Eliane Angela Veit, Ives Solano Araujo, 2016 .

Autonomous Agents and Ethical Decision-Making

Luis-Felipe Rodríguez, Sonia López, Félix F. Ramos Corchado, 2016, Cognitive Computation.

Alternative Processor Within Threshold: Flexible Scheduling on Heterogeneous Systems

Sonia López, Stavan Satish Karia, 2017, 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Distributed execution of transmural electrophysiological imaging with CPU, GPU, and FPGA

Sonia López, Marcin Lukowiak, Sam Skalicky, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches

David H. Albonesi, Oscar Garnica, Juan Lanchares, 2007, HiPEAC.

Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay Path Unequalization

José Ignacio Hidalgo, Román Hermida, Oscar Garnica, 2003, PATMOS.

Enabling FPGA support in Matlab based heterogeneous systems

Sonia López, Marcin Lukowiak, Sam Skalicky, 2014, 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14).

Linear algebra computations in heterogeneous systems

Sonia López, Marcin Lukowiak, Sam Skalicky, 2013, 2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors.

Performance modeling of pipelined linear algebra architectures on FPGAs

Sonia López, Marcin Lukowiak, Sam Skalicky, 2014, Comput. Electr. Eng..

A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors

José Ignacio Hidalgo, Guadalupe Miñana, Oscar Garnica, 2006, PATMOS.