T. Tsai

Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels

Horng-Chih Lin, Tien-Sheng Chao, Tzu-I Tsai, 2011, IEEE Electron Device Letters.

Comparisons on performance improvement by nitride capping layer among different channel directions nMOSFETs

Yao-Jen Lee, Horng-Chih Lin, Tiao-Yuan Huang, 2007, 2007 International Semiconductor Device Research Symposium.

Channel Thickness Effect on High-Frequency Performance of Poly-Si Thin-Film Transistors

Kun-Ming Chen, G. Huang, T. Chao, 2013, IEEE Electron Device Letters.

Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer

Yao-Jen Lee, T. Chao, Horng-Chih Lin, 2008 .

A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires

C. Su, Horng-Chih Lin, Tiao-Yuan Huang, 2012, Nanoscale Research Letters.

Low-Operating-Voltage Ultrathin Junctionless Poly-Si Thin-Film Transistor Technology for RF Applications

Kun-Ming Chen, C. Su, T. Chao, 2012, IEEE Electron Device Letters.