S.J. Lee

发表

Low-Voltage High-Speed (18 GHz/1 V) Evanescent-Coupled Thin-Film-Ge Lateral PIN Photodetectors Integrated on Si Waveguide

J. Wang, M.B. Yu, G. Lo, 2008, IEEE Photonics Technology Letters.

Characterization and reliability of dual high-k gate dielectric stack (poly-Si-HfO2-SiO2) prepared by in situ RTCVD process for system-on-chip applications

C.H. Choi, D. Kwong, R. Clark, 2003, IEEE Electron Device Letters.

High quality CVD TaN gate electrode for sub-100 nm MOS devices

D. Kwong, Y.H. Kim, S.J. Lee, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Germanium p- & n-MOSFETs fabricated with novel surface passivation (plasma-PH/sub 3/ and thin AlN) and TaN/HfO/sub 2/ gate stack

Fei Gao, Fei Gao, D. Kwong, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Multiple-channel GaAs/AlGaAs high electron mobility transistors

R.T. Chen, S.J. Lee, N. Sheng, 1985, IEEE Electron Device Letters.

Electron mobility enhancement using ultrathin pure Ge on Si substrate

C.W. Liu, C.-Y. Yu, M. Lee, 2005, IEEE Electron Device Letters.

GaAs p- and n-MOS devices integrated with novel passivation (plasma nitridation and AlN-surface passivation) techniques and ALD-HfO2/TaN gate stack

S. Balakumar, Fei Gao, D. Kwong, 2006, 2006 International Electron Devices Meeting.

Optimization of HEMTs in ultra high speed GaAs integrated circuits

C. R. Crowell, S.J. Lee, C. Lee, 1983, 1983 International Electron Devices Meeting.

Schottky Source/Drain MOSFETs on SiGe on Insulator with high-K gate dielectric and TaN gate electrode

S. Balakumar, D. Chi, Rui Li, 2006, 2006 International Workshop on Junction Technology.

Fabrication of high Ge content SiGe layer on Si by Ge condensation technique

S. Balakumar, G. Lo, D. Kwong, 2006, 2006 13th International Symposium on the Physical and Failure Analysis of Integrated Circuits.

High temperature Cu-Sn joints manufactured by a 250/spl deg/C fluxless bonding process

C.C. Lee, S.J. Lee, Yi-Chia Chen, 1995, Proceedings of 1995 IEEE Multi-Chip Module Conference (MCMC-95).

Impact of Local Strain From Selective Epitaxial Germanium With Thin Si/SiGe Buffer on High-Performance p-i-n Photodetectors With a Low Thermal Budget

J. Wang, M.B. Yu, G. Lo, 2007, IEEE Electron Device Letters.

N-type Schottky barrier source/drain MOSFET using ytterbium silicide

A. Chin, D. Kwong, A. Chin, 2004, IEEE Electron Device Letters.

Metal-Germanide Schottky Source/Drain Transistor with High-k/Metal Gate Stack on Ge and Si0.05Ge0.95/Si Substrate

S. Balakumar, D. Chi, Rui Li, 2007, 2007 International Workshop on Junction Technology.

Carrier injection and backgating effect in GaAs MESFET's

B.M. Welch, C.P. Lee, S.J. Lee, 1982, IEEE Electron Device Letters.

Schottky-barrier S/D MOSFETs with high-k gate dielectrics and metal-gate electrode

D.S.H. Chan, A. Chin, D. Kwong, 2004, IEEE Electron Device Letters.

Pt-Germanide Schottky source/drain Germanium p-MOSFET with HfO/sub 2/ gate dielectric and TaN gate electrode

H. B. Yao, M.B. Yu, D. Kwong, 2006, IEEE Electron Device Letters.

Inversion-Mode Self-Aligned $\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}$ N-Channel Metal-Oxide-Semiconductor Field-Effect Transistor With HfAlO Gate Dielectric and TaN Metal Gate

G. Lo, D. Kwong, D. Chi, 2008, IEEE Electron Device Letters.

Germanium pMOSFETs with Schottky-barrier germanide S/D, high-/spl kappa/ gate dielectric and metal gate

A. Chin, D. Kwong, A. Chin, 2005, IEEE Electron Device Letters.

Schottky barrier height in germanide/Ge contacts and its engineering through germanidation induced dopant segregation

H. B. Yao, D. Chi, S.J. Lee, 2007, 2007 International Workshop on Junction Technology.

Dark-Current Suppression in Metal–Germanium–Metal Photodetectors Through Dopant-Segregation in NiGe—Schottky Barrier

J. Wang, M.B. Yu, G. Lo, 2008, IEEE Electron Device Letters.

High quality ultra thin CVD HfO/sub 2/ gate stack with poly-Si gate electrode

D. Kwong, Sungjoo Lee, S.J. Lee, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

High-speed GaAs frequency dividers using a self-aligned dual-level double lift-off substitution gate MESFET process

R. Vahrenkamp, C. Kirkpatrick, S.J. Lee, 1985, IEEE Electron Device Letters.

NMOS Compatible Work Function of TaN Metal Gate With Erbium-Oxide-Doped Hafnium Oxide Gate Dielectric

Y. Yeo, Ming-Fu Li, C. Shen, 2007, IEEE Electron Device Letters.

Comparison of Long-Wave Infrared Quantum-Dots-in-a-Well and Quantum-Well Focal Plane Arrays

S. Krishna, M. Sundaram, S. Krishna, 2009, IEEE Transactions on Electron Devices.