Chang-Lin Yeh

发表

Stress–strain characteristics of tin-based solder alloys at medium strain rate

Yi-Shao Lai, N. Owens, D. R. Frear, 2008 .

AnInvestigation onHeatAffected ZoneforAuWire/Cu Wire andAdvanced Finite Element Wirebonding Model

Y. Lai, H. Hsu, S. Fu, 2008 .

Constitutive Properties of Bulk Solder at `Drop-Impact' Strain Rates

D. Frear, C. Selvanayagam, Y. Lai, 2007, 2007 9th Electronics Packaging Technology Conference.

Stress–Strain Characteristics of Tin-Based Solder Alloys for Drop-Impact Modeling

Yi-Shao Lai, N. Owens, D. R. Frear, 2008 .

Design Guideline for Ball Impact Test Apparatus

Yi-Shao Lai, Chang-Lin Yeh, Y. Lai, 2007 .

Optimal design in enhancing board-level thermomechanical and drop reliability of package-on-package stacking assembly

Yi-Shao Lai, Ching-Chun Wang, Chang-Lin Yeh, 2005, 2005 7th Electronic Packaging Technology Conference.

Micro impact characterisation of solder joint for drop impact application

E.H. Wong, R. Rajoo, S.K.W. Seah, 2006, 56th Electronic Components and Technology Conference 2006.

Prediction of board-level reliability of chip-scale packages under consecutive drops

Yi-Shao Lai, Chin-Li Kao, Chang-Lin Yeh, 2005, 2005 7th Electronic Packaging Technology Conference.

Insights into correlation between board-level drop reliability and package-level ball impact test

Yi-Shao Lai, Chang-Lin Yeh, Y. Lai, 2006, 56th Electronic Components and Technology Conference 2006.

The effect of IMC microstructure of solder joint on the mechanical drop performance in SnxAgCu and SnAgCuX CSP package

Y. Lai, Chang-Lin Yeh, J. Lee, 2006, 56th Electronic Components and Technology Conference 2006.

Experimental studies of board-level reliability of chip-scale packages subjected to JEDEC drop test condition

Yi-Shao Lai, Chang-Lin Yeh, Ping-Feng Yang, 2006, Microelectron. Reliab..

Structural design optimization for board-level drop reliability of wafer-level chip-scale packages

Yi-Shao Lai, Tsung-Yueh Tsai, Chang-Lin Yeh, 2008, Microelectron. Reliab..

High-G drop impact response and failure analysis of a chip packaged printed circuit board

Yi-Shao Lai, Chang-Lin Yeh, S.T. Jenq, 2005, 2005 7th Electronic Packaging Technology Conference.

Dynamic Finite Element Analysis on Underlay Microstructure of Cu/low-k Wafer during Wirebonding

Y. Lai, H. Hsu, Chin-Yuan Hu, 2010 .

Characteristic of Heat Affected Zone for Ultra Thin Gold Wire/Copper Wire and Advanced Finite Element Wirebonding Model

Yi-Shao Lai, Shen-Li Fu, Chang-Lin Yeh, 2008, 2008 10th Electronics Packaging Technology Conference.

Dynamic finite element analysis on underlay microstructure of Cu/low-K wafer during bonding process

Yi-Shao Lai, Shen-Li Fu, Chang-Lin Yeh, 2007, 2007 International Conference on Electronic Materials and Packaging.

Transient simulation of wire pull test on Cu/low-K wafers

Yi-Shao Lai, Chin-Li Kao, Chang-Lin Yeh, 2006, IEEE Transactions on Advanced Packaging.

Calibration of Equivalent Finite Element Model for Packaged Printed Circuit Board by Experimental Modal Analysis

Chang-Lin Yeh, Bor-Tsuen Wang, Rong-Sheng Chen, 2008, 2008 10th Electronics Packaging Technology Conference.

Finite element model verification for packaged printed circuit board by experimental modal analysis

Yi-Shao Lai, Chang-Lin Yeh, Bor-Tsuen Wang, 2008, Microelectron. Reliab..

Support excitation scheme for transient analysis of JEDEC board-level drop test

Yi-Shao Lai, Chang-Lin Yeh, Y. Lai, 2006, Microelectron. Reliab..

Correlation studies for component level ball impact shear test and board level drop test

Willem D. van Driel, N. Owens, Ee-Hua Wong, 2008, Microelectron. Reliab..

Evaluation of solder joint strengths under ball impact test

Yi-Shao Lai, Chang-Lin Yeh, Hsiao-Chuan Chang, 2007, Microelectron. Reliab..

Strip warpage assessment of dual side molding SiP module

Chang-Lin Yeh, M. Shih, D. Tarng, 2017, 2017 IEEE 19th Electronics Packaging Technology Conference (EPTC).

Comprehensive dynamic analysis of wirebonding on Cu/low-K wafers

Yi-Shao Lai, Chang-Lin Yeh, Y. Lai, 2006 .

Transient analysis of the impact stage of wirebonding on Cu/low-K wafers

Yi-Shao Lai, Chang-Lin Yeh, Y. Lai, 2005, Microelectron. Reliab..

Dynamic analysis of wirebonding process on Cu/low-K wafers

Yi-Shao Lai, Chang-Lin Yeh, Jenq-Dah Wu, 2003, Proceedings of the 5th Electronics Packaging Technology Conference (EPTC 2003).

Effects of different drop test conditions on board-level reliability of chip-scale packages

Yi-Shao Lai, Chang-Lin Yeh, Po-Chuan Yang, 2008, Microelectron. Reliab..