A. K. Pandey

发表

A Novel Approach to Model Threshold Voltage and Subthreshold Current of Graded-Doped Junctionless-Gate-All-Around (GD-JL-GAA) MOSFETs

Abhinav Gupta, Vidyadhar Gupta, Himanshi Awasthi, 2021, Silicon.

A Novel Approach to Model Threshold Voltage and Subthreshold Current of Graded-Doped Junctionless-Gate-All-Around (GD-JL-GAA) MOSFETs

Abhinav Gupta, Vidyadhar Gupta, Himanshi Awasthi, 2021 .

A Novel Technique to Investigate the Impact of Temperature and Process Parameters on Electrostatic and Analog/RF Performance of Channel Modulated Junctionless Gate-all-around (CM-JL-GAA) MOSFET

Abhinav Gupta, Vidyadhar Gupta, A. K. Pandey, 2022, Silicon.

Inferring plasma parameters from the sheath characteristics of a dc biased hairpin probe

A. K. Pandey, S. Karkari, J. Joshi, 2020, Plasma Sources Science and Technology.

The Investigation of Gate Oxide and Temperature Changes on Electrostatic and Analog/RF and Behaviour of Nanotube Junctionless Double-Gate-All Around (NJL-DGAA) MOSFETs using Si Nano-materials

Vidyadhar Gupta, A. K. Pandey, T. Gupta, 2023, Silicon.

A Novel Approach to Investigate Analog and Digital Circuit Applications of Silicon Junctionless-Double-Gate (JL-DG) MOSFETs

A. K. Pandey, D. Pandey, Sanjeev Rai, 2021, Silicon.

Influence of Gate Oxide and Subthreshold Leakage in Domino Using Si Nano-Materials

A. K. Pandey, T. Gupta, D. Pandey, 2023, Silicon.

A Novel Technique to Investigate the Impact of Temperature and Process Parameters on Electrostatic and Analog/RF Performance of Channel Modulated Junctionless Gate-all-around (CM-JL-GAA) MOSFET

Vidyadhar Gupta, A. K. Pandey, T. Gupta, 2022, Silicon.

Keeper Effect on Nano Scale Silicon Domino Logic Transistors

A. K. Pandey, T. Gupta, D. Pandey, 2021, Silicon.

Temperature-Dependent Analytical Modeling of Graded-Channel Gate-All-Around (GC-GAA) Junctionless Field-Effect Transistors (JLFETs)

Vidyadhar Gupta, Himanshi Awasthi, Nitish Kumar, 2021, Journal of Electronic Materials.