Yasuo Kohashi

Clock phase control system, integrated circuit design and process therefor

Masayoshi Tojima, Hiromasa Nakajima, Masahiro Oohashi, 1999 .

A MPEG4 programmable codec DSP with an embedded pre/post-processing engine

Tsuyoshi Nakamura, Y. Iizuka, Hiromasa Nakajima, 1999, Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327).

A 90 mW MPEG-4 Video Codec LSI with the Capability for Core Profile(Integrated Electronics)

Tsuyoshi Nakamura, Takashi Hashimoto, Takahiro Kondo, 2003 .

A PROGRAMMABLE VIDEO CODEC SYSTEM FOR

Hisashi Inoue, Hiromasa Nakajima, Yasuo Kohashi, 1997 .

22.1 A 27MHz 11.1mW MPEG-4 Video Decoder LSI for Mobile Application

Ken-ichi Ishida, Takahiro Nishi, Takashi Hashimoto, 2002 .

Low Bit-rate Video Coding Using a DSP for Consumer Applications

Hiroshi Inoue, Yasuo Kohashi, Masatoshi Matsuo, 1998 .

High Performance DMAsteuerung

Yasuo Kohashi, Tomonori Yonezawa, Masayoshi Tojima, 2001 .