Shih-Chieh Chang

发表

Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams

Shih-Chieh Chang, Malgorzata Marek-Sadowska, TingTing Hwang, 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Learning with Hierarchical Complement Objective pdf

Shih-Chieh Chang, Wei Wei, Da-Cheng Juan, 2019, ArXiv.

Technology Mapping via Transformations of Function Graphs

Shih-Chieh Chang, Malgorzata Marek-Sadowska, 1992, ICCD.

Low-speed scan testing of charge-sharing faults for CMOS domino circuits

Shih-Chieh Chang, Wen-Ben Jone, Jinn-Shyan Wang, 2000, Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Electromigration and voltage drop aware power grid optimization for power gated ICs

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Aida Todri, 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).

Postlayout logic restructuring using alternative wires

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng, 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Analysis and optimization of power-gated ICs with multiple power gating configurations

Shih-Chieh Chang, Malgorzata Marek-Sadowska, A. Todri, 2007, ICCAD 2007.

Fast Boolean optimization by rewiring

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Lukas P. P. P. van Ginneken, 1996, ICCAD 1996.

An efficient algorithm for local don't care sets calculation

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng, 1995, DAC '95.

Crosstalk Alleviation for Dynamic PLAs

Shih-Chieh Chang, Tzyy-Kuen Tien, Tong-Kai Tsai, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Spare Cells With Constant Insertion for Engineering Change

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Ya-Ting Chang, 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Layout Driven Logic Synthesis for FPGAs

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng, 1994, 31st Design Automation Conference.

Logic Synthesis for Engineering Change

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng, 1999, 32nd Design Automation Conference.

An Efficient Mechanism for Performance Optimization of Variable-Latency Designs

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Yu-Shih Su, 2007, 2007 44th ACM/IEEE Design Automation Conference.

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

Shih-Chieh Chang, Meng-Fan Chang, Shanshi Huang, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).

Performance Optimization Using Variable-Latency Design Style

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Yu-Shih Su, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Perturb And Simplify: Multi-level Boolean Network Optimizer

Shih-Chieh Chang, M. Marek-Sadowska, 1994, IEEE/ACM International Conference on Computer-Aided Design.

Perturb and simplify: multilevel Boolean network optimizer

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng, 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Timing analysis considering IR drop waveforms in power gating designs

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Shih-Hung Weng, 2008, 2008 IEEE International Conference on Computer Design.

Person Identification by Walking Gesture Using Skeleton Sequences

Shih-Chieh Chang, Li-Huang Tsai, Hsin-Ping Chou, 2020, ACIVS.

Circuit Optimization by Rewiring

Shih-Chieh Chang, Malgorzata Marek-Sadowska, Lukas P. P. P. van Ginneken, 1999, IEEE Trans. Computers.

Technology mapping and circuit depth optimization for field programmable gate arrays

Shih-Chieh Chang, Malgorzata Marek-Sadowska, 1993 .