J. de Marneffe

发表

Study on metrology of ERU tuning in TCP reactor, using PVx2 sensor wafer

H. Struyf, A. Milenin, W. Boullart, 2010, 2010 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC).

Performance improvement of tall triple gate devices with strained SiN layers

E. Sleeckx, A. De Keersgieter, N. Collaert, 2005, IEEE Electron Device Letters.

A route towards the fabrication of 2D heterostructures using atomic layer etching combined with selective conversion

I. Radu, S. De Gendt, J. de Marneffe, 2019, 2D Materials.

Low-k integration: Gas screening for cryogenic etching and plasma damage mitigation

P. Lefaucheux, R. Dussart, T. Tillocher, 2019, Frontiers of Chemical Science and Engineering.

Low damage ultra-low-k patterning using a high boiling point organic (HBPO) combined with NF3

K. Vanstreels, J. de Marneffe, R. Chanson, 2018, Plasma Research Express.

Characterization of Ru4-xTax (x = 1,2,3) alloy as material candidate for EUV low-n mask

K. Opsomer, C. Detavernier, F. Scholze, 2021 .

Alternative integration of ultralow-k dielectrics by template replacement approach

N. Heylen, Z. Tokei, S. De Gendt, 2015, 2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM).

Reactive plasma cleaning and restoration of transition metal dichalcogenide monolayers

Kristof M. Bal, D. Lin, S. De Gendt, 2021, npj 2D Materials and Applications.

Demonstration of Ni fully germanosilicide as a pFET gate electrode candidate on HfSiON

A. Veloso, K. Opsomer, M. Jurczak, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Metal barrier induced damage in self-assembly based organosilica low-k dielectrics and its reduction by organic template residues

Christopher J. Wilson, H. Bender, S. Gendt, 2019, Applied Surface Science.

Comparison of vacuum ultra-violet emission of Ar/CF4 and Ar/CF3I capacitively coupled plasmas

A. Rakhimov, J. de Marneffe, M. Baklanov, 2016 .

Optimized pore stuffing for enhanced compatibility with interconnect integration flow

K. Croes, O. Pedreira, Z. Tokei, 2015, 2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM).

Damage free cryogenic etching of ultra low-k materials

Liping Zhang, R. Dussart, J. de Marneffe, 2013, 2013 IEEE International Interconnect Technology Conference - IITC.

Integration of a k=2.3 spin-on polymer for the sub-28nm technology node using EUV lithography

S. Demuynck, E. Van Besien, L. Zhang, 2012, 2012 IEEE International Interconnect Technology Conference.

Area selective grafting of siloxane molecules on low-k dielectric with respect to copper surface

J. de Marneffe, S. Armini, E. Gornev, 2019, Applied Surface Science.

Development of a novel wafer-probe for in situ measurements of thin film properties

J. de Marneffe, M. Bowden, D. Marinov, 2015 .

Cryogenic etching processes applied to porous low-k materials using SF6/C4F8 plasmas

P. Lefaucheux, R. Dussart, T. Tillocher, 2015 .

Novel Volatile Film for the Protection of Organo-Silicate Glass Dielectric Materials

J. de Marneffe, K. Maekawa, R. Chanson, 2019, IEEE Transactions on Semiconductor Manufacturing.

Plasma enhanced atomic layer etching of high-k layers on WS2

S. De Gendt, J. de Marneffe, A. Goodyear, 2022, Journal of Vacuum Science & Technology A.

Experimental and theoretical study of RF capacitively coupled plasma in Ar–CF4–CF3I mixtures

J. de Marneffe, M. Baklanov, D. Lopaev, 2015 .

Mechanisms of hydrogen atom interactions with MoS2 monolayer

J. de Marneffe, Y. Mankelevich, D. Marinov, 2020, Journal of physics. Condensed matter : an Institute of Physics journal.

Etching of low-k materials for microelectronics applications by means of a N2/H2 plasma: modeling and experimental investigation

A. Bogaerts, S. Tinck, J. de Marneffe, 2013 .

Two-dimensional WS2 nanoribbon deposition by conversion of pre-patterned amorphous silicon

I. Radu, M. Caymax, C. Huyghebaert, 2017, Nanotechnology.

The metal hard-mask approach for contact patterning

W. Boullart, D. Shamiryan, D. Goossens, 2009, International Conference on Micro- and Nano-Electronics.

Strain enhanced FUSI/HfSiON Technology with optimized CMOS Process Window

M. Jurczak, J. Kittl, V. Paraschiv, 2007, 2007 IEEE Symposium on VLSI Technology.

Work function engineering by FUSI and its impact on the performance and reliability of oxynitride and Hf-silicate based MOSFETs

K. Devriendt, A. Veloso, M. Jurczak, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Demonstration of fully Ni-silicided metal gates on HfO/sub 2/ based high-k gate dielectrics as a candidate for low power applications

E. Augendre, A. Veloso, S. Biesemans, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

Widening of FUSI RTP Process Window by Spike Anneal

J. Kittl, A. Lauwers, S. Kubicek, 2007, 2007 15th International Conference on Advanced Thermal Processing of Semiconductors.

Mitigation of plasma-induced damage in porous low-k dielectrics by cryogenic precursor condensation

Liping Zhang, S. Gendt, S. De Gendt, 2016 .

Study of novel EUVL mask absorber candidates

Patrick Jaenen, Vicky Philipsen, Victor Soltwisch, 2021 .

Diffusion-less junctions and super halo profiles for PMOS transistors formed by SPER and FUSI gate in 45 nm physical gate length devices

A. Veloso, M. Jurczak, A. Lauwers, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Wafer-scale integration of double gated WS2-transistors in 300mm Si CMOS fab

T. Schram, K. Devriendt, I. Radu, 2020, 2020 IEEE International Electron Devices Meeting (IEDM).

H2 plasma and neutral beam treatment of EUV photoresist

S. De Gendt, Z. el Otell, D. Marinov, 2015, Advanced Lithography.

Molecular glass resist performance for nano-pattern transfer

Ziad el Otell, Andreas Ringk, Tristan Kolb, 2015, Advanced Lithography.

Quantified Uniformity and Selectivity of TiO2 Films in 45‐nm Half Pitch Patterns Using Area‐Selective Deposition Supercycles

A. Delabie, G. Parsons, J. de Marneffe, 2023, Advanced Materials Interfaces.

Integration of porous low-k dielectrics using post porosity pore protection

Christopher J. Wilson, N. Heylen, Liping Zhang, 2016 .

Vacuum ultra-violet emission of CF4 and CF3I containing plasmas and Their effect on low-k materials

J. de Marneffe, M. Baklanov, A. Zotovich, 2015 .

CMOS integration of dual work function phase controlled Ni FUSI with simultaneous silicidation of NMOS (NiSi) and PMOS (Ni-rich silicide) gates on HfSiON

S. Locorotondo, T. Chiarella, C. Vrancken, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..