S. Guillaumet

High Performances 3D Damascene MIM Capacitors Integrated in Copper Back-End Technologies

A. Farcy, S. Crémer, C. Richard, 2006, 2006 Bipolar/BiCMOS Circuits and Technology Meeting.

High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond

M. Khare, S. Luning, O. Faynot, 2013, 2013 IEEE International Electron Devices Meeting.

W/Ta2O5/TaN MIM capacitor for high density one time programmable memory

T. Skotnicki, A. Villaret, P. Candelier, 2007, ESSDERC 2007 - 37th European Solid State Device Research Conference.

Hybrid bonding for 3D stacked image sensors: impact of pitch shrinkage on interconnect robustness

L. Arnaud, E. Deloffre, A. Farcy, 2018, 2018 IEEE International Electron Devices Meeting (IEDM).

1μm Pitch direct hybrid bonding with <300nm wafer-to-wafer overlay accuracy

L. Arnaud, F. Fournel, A. Farcy, 2017, 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

FDSOI CMOS devices featuring dual strained channel and thin BOX extendable to the 10nm node

O. Faynot, Y. Escarabajal, B. Lherron, 2014, 2014 IEEE International Electron Devices Meeting.