I. Young

A 90 nm communication technology featuring SiGe HBT transistors, RF CMOS, precision R-L-C RF elements and 1 /spl mu/m2 6-T SRAM cell

A. Murthy, A. Murthy, S. Cea, 2002, Digest. International Electron Devices Meeting,.

A PLL clock generator with 5 to 110 MHz lock range for microprocessors

Keng L. Wong, I. Young, J. Greason, 1992, 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

Analog mixed-signal circuits in advanced nano-scale CMOS technology for microprocessors and SoCs

Ian A. Young, I. Young, 2010, 2010 Proceedings of ESSCIRC.

MOS switched-capacitor analog sampled-data direct-form recursive filters

I.A. Young, D.A. Hodges, D. Hodges, 1979, IEEE Journal of Solid-State Circuits.

A 0.35 /spl mu/m CMOS 3-880 MHz PLL N/2 clock multiplier and distribution network with low jitter for microprocessors

B. Bhushan, I.A. Young, M.F. Mar, 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.