G. Lo

Low-K Dielectric Compatible Wafer-Level Compliant Chip-to-Substrate Interconnects

S. Sitaraman, K. Kacker, G. Lo, 2008, IEEE Transactions on Advanced Packaging.

G-helix: lithography-based wafer-level compliant chip-to-substrate interconnects

S. Sitaraman, G. Lo, 2004, 2004 Proceedings. 54th Electronic Components and Technology Conference (IEEE Cat. No.04CH37546).

System-Level Reliability Assessment of Mixed-Signal

G. Ramakrishna, Kevin M. Klein, Suresh K. Sitaraman, 2004 .

Electroplated Compliant High-Density Interconnects For Next-Generation Microelectronic Packaging

G. Lo, 2004 .

Wafer-Level, Compliant, Off-Chip Interconnects for Next-Generation Low-K Dielectric/Cu IC’s

S. Sitaraman, K. Kacker, G. Lo, 2006 .

System-level reliability assessment of mixed-signal convergent microsystems

G. Ramakrishna, R.V. Pucha, J. Ahmad, 2004, IEEE Transactions on Advanced Packaging.

Use-condition-based cyclic bend test development for handheld components

S. Sahasrabudhe, J.P. Sedillo, E. Monroe, 2004, 2004 Proceedings. 54th Electronic Components and Technology Conference (IEEE Cat. No.04CH37546).