Zibin Dai

发表

Design and implementation of a SoC for privacy storage equipment

Wei Li, Xin Gong, Zibin Dai, 2011, Proceedings 2011 International Conference on Transportation, Mechanical, and Electrical Engineering (TMEE).

The research and design of parallel instruction targeted at substitution box

Wei Li, Tao Chen, Zibin Dai, 2009, 2009 IEEE 8th International Conference on ASIC.

Design of configurable LFSR instructions targeted at stream cipher processing

Xuan Yang, Zibin Dai, Longmei Nan, 2011, 2011 IEEE International Conference of Electron Devices and Solid-State Circuits.

A VLIW architecture stream cryptographic processor for information security

Xiaoyang Zeng, Wei Li, Xuan Yang, 2019, China Communications.

Research and implementation of parallel and reconfigurable MICKEY algorithm

Miao Li, Zibin Dai, Xiaohui Yang, 2009, 2009 IEEE 8th International Conference on ASIC.

An improved MLS policy model

Yi Zhou, Zibin Dai, Junwei Li, 2016, 2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID).

The research of block cipher reconfigurable clustered architecture and implementation technology

Tao Chen, Xiaonan Li, Chengwei Zheng, 2013, CIT 2013.

Research on reconfigurable multiplier unit based on GF[(28)]4 field of symmetric cryptography

Yang Xuan, Jianbo Xu, Zibin Dai, 2011, ASICON.

Fast Parallel Extract-Shift and Parallel Deposit-Shift in General-Purpose Processors

Wei Li, Xiao Feng, Zibin Dai, 2015, 2015 IEEE 12th Intl Conf on Ubiquitous Intelligence and Computing and 2015 IEEE 12th Intl Conf on Autonomic and Trusted Computing and 2015 IEEE 15th Intl Conf on Scalable Computing and Communications and Its Associated Workshops (UIC-ATC-ScalCom).

A unified, scalable dual-field Montgomery multiplier architecture for ECCs

Zibin Dai, Wanzhong Sun, Nianmin Ren, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

Design and implementation of configurable NBF instructions targeted at stream cipher processing

Xiaonan Li, Xuan S. Yang, Zibin Dai, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Research and Design of Extended Permutation Module for RISC Processor

Lin Chen, Zibin Dai, Yuqian Xue, 2018, 2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM).

Research and Design of Pipeline Register Structure Based on Coarse-grained Reconfigurable Array

Wei Li, Yiran Du, Zibin Dai, 2018, 2018 IEEE 3rd Advanced Information Technology, Electronic and Automation Control Conference (IAEAC).

An area-efficient interconnection network for coarse-grain reconfigurable cryptographic array

Wei Li, Zibin Dai, Longmei Nan, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

Exploiting OLP, ILP and TLP of RCBCP

Zibin Dai, Tao Meng, Xuerong Yu, 2008, 2008 3rd International Conference on Innovative Computing Information and Control.

A high-flexibility and energy-efficient application-specific cryptography VLIW processor for symmetric cipher algorithms

Wei Li, Xiaoyang Zeng, Tao Chen, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Design and application of reusable SoC verification platform

Wei Li, Zibin Dai, Lulu Feng, 2011, 2011 9th IEEE International Conference on ASIC.

The Research of NULL Convention Logic Circuit Computing Model Targeted at Block Cipher Processing

Zibin Dai, Yalei Cui, 2009, 2009 Fifth International Conference on Information Assurance and Security.

An Efficient ASIC Implementation of Public Key Cryptography Algorithm SM2 Based on Module Arithmetic Logic Unit

Tao Chen, Zibin Dai, Wei Li, 2019, 2019 IEEE 13th International Conference on ASIC (ASICON).

Research on design of a reconfigurable parallel structure targeted at LFSR

Wei Li, Xuan Yang, Zibin Dai, 2011, 2011 9th IEEE International Conference on ASIC.

A Design of General Multiplier in GF (28) and FPGA Implementation

Xiaohui Yang, Zibin Dai, Xuerong Yu, 2006, 2006 First International Symposium on Pervasive Computing and Applications.

The research and design of reconfigurable computing for Block cipher

Zibin Dai, Xiaohui Yang, Xuerong Yu, 2008 .

A scalable and efficient hardware architecture for Montgomery modular division in dual field

Wei Li, Zibin Dai, Suwen Yi, 2016, 2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID).

Shared Variable Extraction and Hardware Implementation for Nonlinear Boolean Functions Based on Swarm Intelligence

Lin Chen, Xiaoyang Zeng, Zibin Dai, 2018 .

High-speed realization of parallel algorithm for hash computation on multicore cryptographic processor

Wei Li, Zibin Dai, Qiang Dai, 2016, 2016 International Conference on Integrated Circuits and Microsystems (ICICM).

Research and design of subword shift unit based on inverse butterfly network

Chao Ma, Zibin Dai, Junwei Li, 2017, 2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM).

A High Energy-Efficient Reconfigurable VLIW Symmetric Cryptographic Processor with Loop Buffer Structure and Chain Processing Mechanism

Xiaoyang Zeng, Tao Chen, Wei Li, 2017 .

A High-Throughput Processor for Dual-Field Elliptic Curve Cryptography with Power Analysis Resistance

Wei Li, Xiao Feng, Xiaoyang Zeng, 2015, 2015 IEEE 12th Intl Conf on Ubiquitous Intelligence and Computing and 2015 IEEE 12th Intl Conf on Autonomic and Trusted Computing and 2015 IEEE 15th Intl Conf on Scalable Computing and Communications and Its Associated Workshops (UIC-ATC-ScalCom).

Design and Implementation of a High-Speed Reconfigurable Feedback Shift Register

Wei Li, Tao Chen, Zibin Dai, 2008, 2008 4th IEEE International Conference on Circuits and Systems for Communications.

A highly efficient reconfigurable rotation unit based on an inverse butterfly network

Wei Li, Chao Ma, Zibin Dai, 2017, Frontiers of Information Technology & Electronic Engineering.

Design and optimized implementation of the SHA-2(256, 384, 512) hash algorithms

Huilei He, Zibin Dai, Wanzhong Sun, 2007, 2007 7th International Conference on ASIC.

Research and design of add-based length-scalable dual-field modular multiplication-addition-subtraction

Wei Li, Zibin Dai, Jiamin Li, 2017, 2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM).

A single-supply sub-threshold level shifter with an internal supply feedback loop for multi-voltage applications

Wei Li, Xiaoyang Zeng, Zibin Dai, 2018, IEICE Electron. Express.

Design and implementation of configurable extract instructions targeted at stream cipher processing

Wei Li, Xueying Zhang, Zibin Dai, 2009, 2009 IEEE 8th International Conference on ASIC.

Accelerated Flexible Processor Architecture for Crypto Information

Zibin Dai, Xuerong Yu, Jinhai Su, 2007 .

Design and Implementation of a High-Speed Reconfigurable Modular Arithmetic Unit

Wei Li, Tao Chen, Tao Meng, 2007, APPT.

FPGA implementation of RSA public-key cryptographic coprocessor based on systolic linear array architecture

Nuan Wen, Zibin Dai, Yongfu Zhang, 2006 .

The Research and Implementation of Reconfigurable Processor Architecture for Block Cipher Processing

Wei Li, Tao Chen, Xiaohui Yang, 2008, 2008 International Conference on Embedded Software and Systems.

Study and implementation of cluster hierarchical memory system of multicore cryptographic processor

Wei Li, Tao Chen, Yufei Zhu, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Design and Implementation of Reconfigurable Shift Unit using FPGAs

Xiaohui Yang, Zibin Dai, Tao Meng, 2006, 2006 First International Symposium on Pervasive Computing and Applications.

RC6 architecture-adaptive implementation for coarse-grained reconfiguration array

Wei Li, Zibin Dai, Longmei Nan, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

Parallel Implementation of A5/2 Algorithm

Wei Li, Xueying Zhang, Zibin Dai, 2009 .

Research on reconfigurable nonlinear Boolean functions hardware structure targeted at stream cipher

Wei Li, Xueying Zhang, Zibin Dai, 2009, 2009 2nd International Conference on Power Electronics and Intelligent Transportation System (PEITS).

A Control Flow Integrity Checking Technique Based on Hardware Support

Junwei Li, Yang Li, Zibin Dai, 2018, 2018 IEEE 3rd Advanced Information Technology, Electronic and Automation Control Conference (IAEAC).

A Flexible Data Scheduling Scheme for Block Cipher Processor

Yufei Zhu, Zibin Dai, Jinhui Xu, 2017 .

Design and implementation of low-cost SM4 for consumer electronic product

Wei Li, Zibin Dai, Lichao Zhang, 2016, 2016 IEEE International Conference on Consumer Electronics-China (ICCE-China).

Design and Implementation of Reconfigurable Modulo (2n+1) Multiplication IP Core using FPGAs

Qiang Meng, Yuanfeng Liu, Jianguo Liu, 2006, 2006 First International Symposium on Pervasive Computing and Applications.

A scalable hybrid modular multiplication algorithm

Tao Chen, Qiang Meng, Zibin Dai, 2008 .