P. N. Bibilo

发表

Application of productions for automatic control of logical design of discrete devices

P. N. Bibilo, V. I. Romanov, 2007 .

Algorithmic Design of Digital Operational Units with Low Power Consumption

P. N. Bibilo, M. A. Audzeyeu, 2018 .

Joint decomposition of Boolean functions on the basis of a solution of logic equations

P. N. Bibilo, 2008, Automatic Control and Computer Sciences.

Verification of VHDL Descriptions Networks of Synchronous Finite State Machines

P. N. Bibilo, A. E. Kolodenkova, N. A. Avdeev, 2018 .

PRALU-to-VHDL conversion of parallel-algorithm descriptions for control units

P. N. Bibilo, 2006 .

Logic synthesis from VHDL descriptions using LeonardoSpectrum: Theoretical basis

P. N. Bibilo, 2005 .

Estimating energy consumption in logical CMOS circuits based on their switching activity

P. N. Bibilo, N. A. Kirienko, 2012 .

The use of binary decision diagrams for the decomposition of programmable logic arrays

P. N. Bibilo, P. V. Leonczyk, 2011, Automatic Control and Computer Sciences.

Construction of tests for providing elevated energy consumption for a combinatorial circuit of library elements

P. N. Bibilo, 2015, Automatic Control and Computer Sciences.

Synthesis Techniques for Masterslice Combinational Logic: A Computer-Aided Evaluation

P. N. Bibilo, V. G. Litskevich, 2001 .

Experimental Research of Effectiveness of Programs for Minimizing BDD Representations of Boolean Function Systems in Synthesis of Combinatorial CMOS Circuits

P. N. Bibilo, Y. Y. Lankevich, 2020 .

Logic Synthesis of Series-MOSFET Programmable Arrays

P. N. Bibilo, 2002 .

Decomposing a System of Boolean Functions into Subsystems of Connected Functions

P. N. Bibilo, 2019 .

Minimization of Binary Decision Diagrams for Systems of Incompletely Defined Boolean Functions Using Inverse Cofactors

P. N. Bibilo, 2020 .

Decomposition of a system of incompletely specified Boolean functions defined with a binary decision diagram

P. N. Bibilo, 2014, Autom. Remote. Control..

Logical optimization efficiency in the synthesis of combinational circuits

P. N. Bibilo, N. A. Avdeev, 2015 .

The Energy-Intensive Testing Sets Selection for Realization of the Increased Power Consumption Mode of the Combinational CMOS Circuits

P. N. Bibilo, I. P. Loginova, 2016 .

The use of models of incompletely specified Boolean functions in logical circuit synthesis based on VHDL descriptions

P. N. Bibilo, 2013, Automatic Control and Computer Sciences.

Decomposition and Minimization of Binary Decision Diagrams for Systems of Specified Boolean Functions

P. N. Bibilo, 2014 .

Determination of the delay of a programmable logic array

P. N. Bibilo, N. A. Avdeev, N. Avdeev, 2010 .

A System for Logical Design of Custom CMOS VLSI Functional Blocks with Reduced Power Consumption

P. N. Bibilo, V. I. Romanov, N. A. Avdeev, 2018, Russian Microelectronics.

Automated design of modular arithmetic devices: Might CAD replace an engineer

P. N. Bibilo, D. A. Gorodecky, 2009, Automatic Control and Computer Sciences.

New experiments on iterative synthesis of combinational circuits

P. N. Bibilo, V. I. Romanov, 2008 .

Estimation of the energy consumption of digital devices represented by a composition of a control FSM and an arithmetic and logic unit

P. N. Bibilo, 2017 .

Using the models of incompletely specified Boolean functions in the synthesis of schemes by VHDL descriptions

P. N. Bibilo, A. L. Solov’ev, 2013 .

Constructing Compact Tests for Functional Verification of VHDL Descriptions of the Finite State Machines

P. N. Bibilo, 2017 .

Circuit Implementation of Parallel Logical Control Algorithms Represented in PRALU Description

A. D. Zakrevskij, P. N. Bibilo, V. I. Romanov, 2016 .

Custom Logic: A Toolkit for the Design of VLSI Custom Control MOS Logic

N. R. Toropov, P. N. Bibilo, V. I. Romanov, 2004 .

Experimental investigation of the BDD optimization procedure effect on combinational CMOS circuit energy consumption

P. N. Bibilo, P. V. Leonchik, P. Bibilo, 2010, Automatic Control and Computer Sciences.

Minimization of binary decision diagrams for systems of completely defined Boolean functions using Shannon expansions and algebraic representations of cofactors

P. N. Bibilo, V. I. Romanov, P. Bibilo, 2021, Informatics.

Logical minimization for combinatorial structure in FPGA

P. N. Bibilo, V. I. Romanov, Yu. Yu. Lankevich, 2021 .