A. Chatterjee

发表

Automatic test generation for linear digital systems with bi-level search using matrix transform methods

J. Patel, J. Abraham, M. d'Abreu, 1992, ICCAD '92.

Periodic jitter and bounded uncorrelated jitter decomposition using incoherent undersampling

S. Hsiao, A. Chatterjee, N. Tzou, 2013, DATE 2013.

Activity measures for fast relative power estimation directed numerical transformation for low power DSP synthesis

A. Chatterjee, H. Nguyen, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

Greedy Hardware Optimization For Linear Digital Systems Using Number Splitting And Repeated Factorization

Abhijit Chatterjee, Rabindra K. Roy, Manuel A. d'Abreu, 1993, The Sixth International Conference on VLSI Design.

Efficient I ns t ru ct io n -Level 0 pt i m izat i on M'e t hod0 logy for Low-Power Embedded Systems*

A. Chatterjee, Kyu-won Choi, 2001 .

Low-cost testing of ADCs and DACs

Abhijit Chatterjee, Shalabh Goyal, A. Chatterjee, 2006 .

Reinforcement Learning Based Power-Optimal Usage of Beamforming Antenna Array for Multi-Way Wireless Communication in Vehicular Traffic Environments

A. Chatterjee, Suhasini Komarraju, 2022, 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS).

Guest Editors' Introduction: Low-Power VLSI Design

Kaushik Roy, Abhijit Chatterjee, K. Roy, 1994, IEEE Des. Test Comput..

Low Cost Built-in Sensor Testing of Phase-Locked Loop Dynamic Parameters

S. Hsiao, A. Chatterjee, Xian Wang, 2014, Journal of Electronic Testing.

BIST/Digital-Compatible Testing of RF Devices Using Distortion Model Fitting

A. Chatterjee, Shreyas Sen, A. Banerjee, 2012, Journal of Electronic Testing.

Efficient Low Cost Alternative Testing of Analog Crossbar Arrays for Deep Neural Networks

A. Chatterjee, Kwondo Ma, Anurup Saha, 2022, 2022 IEEE International Test Conference (ITC).

Sensitivity and reliability evaluation for mixed-signal ICs under electromigration and hot-carrier effects

Abhijit Chatterjee, Xiangdong Xuan, A. Chatterjee, 2001, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

TRAP: Test Generation Driven Classification of Analog/RF ICs Using Adaptive Probabilistic Clustering Algorithm

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2016, 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID).

An Accurate DNA Sensing and Diagnosis Methodology Using Fabricated Silicon Nanopores

Abhijit Chatterjee, Soumendu Bhattacharya, Sankar Nair, 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

Efficient DNA sensing with fabricated silicon nanopores: diagnosis methodology and algorithms

Abhijit Chatterjee, Vishwanath Natarajan, Soumendu Bhattacharya, 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

Design of real-number checksum codes using shared partial computation for CED in linear DSP systems

Abhijit Chatterjee, Huy Nguyen, A. Chatterjee, 2002, Proceedings of the Eighth IEEE International On-Line Testing Workshop (IOLTW 2002).

Design of efficient analog physically unclonable functions using alternative test principles

Abhijit Chatterjee, Sabyasachi Deyati, Barry Muldrey, 2017, 2017 International Mixed Signals Testing Workshop (IMSTW).

Adaptive testing of analog/RF circuits using hardware extracted FSM models

Abhijit Chatterjee, Sabyasachi Deyati, Barry John Muldrey, 2016, 2016 IEEE 34th VLSI Test Symposium (VTS).

Signature Driven Hierarchical Post-Manufacture Tuning of RF Systems for Performance and Power

Abhijit Chatterjee, Aritra Banerjee, A. Chatterjee, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Yield Recovery of RF Transceiver Systems Using Iterative Tuning-Driven Power-Conscious Performance Optimization

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2015, IEEE Design & Test.

Process-Variation Tolerant Channel-Adaptive Virtually Zero-Margin Low-Power Wireless Receiver Systems

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Alternative “safe” test of hysteretic power converters

Abhijit Chatterjee, Xian Wang, Blanchard Kenfack, 2014, 2014 IEEE 32nd VLSI Test Symposium (VTS).

Built-In Test of Switched-Mode Power Converters: Avoiding DUT Damage Using Alternative Safe Measurements

Abhijit Chatterjee, Xian Wang, Blanchard Kenfack, 2013, 2013 22nd Asian Test Symposium.

Efficient system-level testing and adaptive tuning of MIMO-OFDM wireless transmitters

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2013, 2013 18th IEEE European Test Symposium (ETS).

Dynamic Specification Testing and Diagnosis of High-Precision Sigma-Delta ADCs

Abhijit Chatterjee, Sehun Kook, Aritra Banerjee, 2013, IEEE Design & Test.

Low Cost EVM Testing of Wireless RF SoC Front-Ends Using Multitones

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Pilot symbol driven monitoring of electrical degradation in RF transmitter systems using model anomaly diagnosis

Abhijit Chatterjee, Sabyasachi Deyati, Aritra Banerjee, 2012, 2012 IEEE 18th International On-Line Testing Symposium (IOLTS).

A self-testable SiGe LNA and Built-in-Self-Test methodology for multiple performance specifications of RF amplifiers

Abhijit Chatterjee, Madhavan Swaminathan, John D. Cressler, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

Accurate signature driven power conscious tuning of RF systems using hierarchical performance models

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2011, 2011 IEEE International Test Conference.

Power Aware Post-manufacture Tuning of Analog Nanocircuits

Abhijit Chatterjee, Aritra Banerjee, Azad Naeemi, 2011, 2011 Sixteenth IEEE European Test Symposium.

Automatic test stimulus generation for accurate diagnosis of RF systems using transient response signatures

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2011, 29th VLSI Test Symposium.

Optimized Multitone Test Stimulus Driven Diagnosis of RF Transceivers Using Model Parameter Estimation

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2011, 2011 24th Internatioal Conference on VLSI Design.

Design of process and environment adaptive ultra-low power wireless circuits and systems

Abhijit Chatterjee, Shreyas Sen, A. Chatterjee, 2011 .

Optimized digital compatible pulse sequences for testing of RF front end modules

Abhijit Chatterjee, Vishwanath Natarajan, Shyam Kumar Devarakond, 2010, 2010 IEEE 16th International Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW).

A holistic approach to accurate tuning of RF systems for large and small multiparameter perturbations

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2010, 2010 28th VLSI Test Symposium (VTS).

Concurrent process model and specification cause-effect monitoring using alternate diagnostic signatures

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2010, 2010 28th VLSI Test Symposium (VTS).

DSP-Driven Self-Tuning of RF Circuits for Process-Induced Performance Variability

Abhijit Chatterjee, Byung-Sung Kim, Donghoon Han, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A novel self-healing methodology for RF Amplifier circuits based on oscillation principles

Madhavan Swaminathan, John D. Cressler, Abhilash Goyal, 2012, 2009 Design, Automation & Test in Europe Conference & Exhibition.

Self-Calibrating Embedded RF Down-Conversion Mixers

Abhijit Chatterjee, Madhavan Swaminathan, Abhilash Goyal, 2009, 2009 Asian Test Symposium.

Low Cost Dynamic Test Methodology for High Precision ΣΔ ADCs

Abhijit Chatterjee, Vishwanath Natarajan, Le Jin, 2009, 2009 Asian Test Symposium.

BIST Driven Power Conscious Post-Manufacture Tuning of Wireless Transceiver Systems Using Hardware-Iterated Gradient Search

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2009, 2009 Asian Test Symposium.

BIST assisted wideband digital compensation for MB-UWB transmitters

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2009, 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

EVM Testing of Wireless OFDM Transceivers Using Intelligent Back-End Digital Signal Processing Algorithms

Abhijit Chatterjee, Vishwanath Natarajan, Hyun Woo Choi, 2008, 2008 IEEE International Test Conference.

Efficient Low-Cost Testing of Wireless OFDM Polar Transceiver Systems

Abhijit Chatterjee, Vishwanath Natarajan, Deuk Lee, 2008, 2008 17th Asian Test Symposium.

ACT: Adaptive Calibration Test for Performance Enhancement and Increased Testability of Wireless RF Front-Ends

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2008, 26th IEEE VLSI Test Symposium (vts 2008).

System-Level Specification Testing Of Wireless Transceivers

Abhijit Chatterjee, Achintya Halder, Soumendu Bhattacharya, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Testing RF Components with Supply Current Signatures

A. Chatterjee, S. Sen, S.S. Akbay, 2007, 16th Asian Test Symposium (ATS 2007).

Fourier Spectrum-Based Signature Test: A Genetic CAD Toolbox for Reliable RF Testing Using Low-Performance Test Resources

V. Natarajan, G. Srinivasan, A. Chatterjee, 2007, 16th Asian Test Symposium (ATS 2007).

Fault-based alternate test of RF components

Abhijit Chatterjee, Selim Sermet Akbay, A. Chatterjee, 2007, 2007 25th International Conference on Computer Design.

Low-cost parametric test and diagnosis of RF systems using multi-tone response envelope detection

Abhijit Chatterjee, Donghoon Han, Soumendu Bhattacharya, 2007, IET Comput. Digit. Tech..

Signature Testing of Analog and RF Circuits: Algorithms and Methodology

Abhijit Chatterjee, Soumendu Bhattacharya, Sasikumar Cherubal, 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

Alternate Diagnostic Testing and Compensation of RF Transmitter Performance Using Response Detection

Abhijit Chatterjee, Rajarajan Senguttuvan, A. Chatterjee, 2007, 25th IEEE VLSI Test Symposium (VTS'07).

Novel Cross-Loopback Based Test Approach for Specification Test of Multi-Band, Multi-Hardware Radios

A. Chatterjee, G. Srinivasan, V. Natarajan, 2007, 25th IEEE VLSI Test Symposium (VTS'07).

Alternate Test of RF Front Ends with IP Constraints: Frequency Domain Test Generation and Validation

Abhijit Chatterjee, Selim Sermet Akbay, Jose L. Torres, 2006, 2006 IEEE International Test Conference.

On-line error detection in wireless RF transmitters using real-time streaming data

Abhijit Chatterjee, Vishwanath Natarajan, Ganesh Srinivasan, 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

Alternate loop-back diagnostic tests for wafer-level diagnosis of modern wireless transceivers using spectral signatures

A. Chatterjee, F. Taenzler, G. Srinivasan, 2006, 24th IEEE VLSI Test Symposium.

Alternate electrical tests for extracting mechanical parameters of MEMS accelerometer sensors

Abhijit Chatterjee, Vishwanath Natarajan, Soumendu Bhattacharya, 2006, 24th IEEE VLSI Test Symposium.

Low-cost Production Test of BER for Wireless Receivers

Abhijit Chatterjee, Achintya Halder, A. Chatterjee, 2005, 14th Asian Test Symposium (ATS'05).

Robust Built-In Test of RF ICs Using Envelope Detectors

Abhijit Chatterjee, Donghoon Han, A. Chatterjee, 2005, 14th Asian Test Symposium (ATS'05).

Test generation for specification test of analog circuits using efficient test response observation methods

Abhijit Chatterjee, Achintya Halder, A. Chatterjee, 2005, Microelectron. J..

Low-cost alternate EVM test for wireless receiver systems

Abhijit Chatterjee, Achintya Halder, A. Chatterjee, 2005, 23rd IEEE VLSI Test Symposium (VTS'05).

Built-in test of RF components using mapped feature extraction sensors

Abhijit Chatterjee, Selim Sermet Akbay, A. Chatterjee, 2005, 23rd IEEE VLSI Test Symposium (VTS'05).

Optimized wafer-probe and assembled package test design for analog circuits

Abhijit Chatterjee, Soumendu Bhattacharya, A. Chatterjee, 2005, TODE.

A system-level alternate test approach for specification test of RF transceivers in loopback mode

Abhijit Chatterjee, Achintya Halder, Soumendu Bhattacharya, 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

A built-in loopback test methodology for RF transceiver circuits using embedded sensor circuits

Abhijit Chatterjee, Soumendu Bhattacharya, A. Chatterjee, 2004, 13th Asian Test Symposium.

Reconfiguration for enhanced alternate test (REALTest) of analog circuits

Abhijit Chatterjee, Shalabh Goyal, Ganesh Srinivasan, 2004, 13th Asian Test Symposium.

Quasi-oscillation based test for improved prediction of analog performance parameters

Abhijit Chatterjee, Jacob A. Abraham, Ji Hwan Chun, 2004, 2004 International Conferce on Test.

Use of embedded sensors for built-in-test RF circuits

A. Chatterjee, S. Bhattacharya, 2004, 2004 International Conferce on Test.

Simulation-in-the-loop analog circuit sizing method using adaptive model-based simulated annealing

Abhijit Chatterjee, Donghoon Han, A. Chatterjee, 2004, 4th IEEE International Workshop on System-on-Chip for Real-Time Applications.

Prediction of analog performance parameters using oscillation based test

Abhijit Chatterjee, Jacob A. Abraham, Hongjoong Shin, 2004, 22nd IEEE VLSI Test Symposium, 2004. Proceedings..

System-level testing of RF transmitter specifications using optimized periodic bitstreams

Abhijit Chatterjee, Achintya Halder, Soumendu Bhattacharya, 2004, 22nd IEEE VLSI Test Symposium, 2004. Proceedings..

Feature extraction based built-in alternate test of RF components using a noise reference

Abhijit Chatterjee, Selim Sermet Akbay, A. Chatterjee, 2004, 22nd IEEE VLSI Test Symposium, 2004. Proceedings..

Automated test generation and test point selection for specification test of analog circuits

Abhijit Chatterjee, Achintya Halder, A. Chatterjee, 2004, International Symposium on Signals, Circuits and Systems. Proceedings, SCS 2003. (Cat. No.03EX720).

Efficient test strategy for TDMA power amplifiers using transient current measurements: uses and benefits

Abhijit Chatterjee, Soumendu Bhattacharya, Ganesh Srinivasan, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Test time reduction for ACPR measurement of wireless transceivers using periodic bit-stream sequences

Abhijit Chatterjee, Soumendu Bhattacharya, Ganesh Srinivasan, 2004, Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications.

Built-In-Test of Analog and RF Circuits using Embedded Sensors

Abhijit Chatterjee, Soumendu Bhattacharya, A. Chatterjee, 2004 .

Automatic multitone alternate test-generaton for rf circuits using behavioral models

Abhijit Chatterjee, Achintya Halder, Soumendu Bhattacharya, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

Prediction of analog performance parameters using fast transienttesting

Abhijit Chatterjee, Pramodchandran N. Variyam, Sasikumar Cherubal, 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Constrained specification-based test stimulus generation for analog circuits using nonlinear performance prediction models

Abhijit Chatterjee, Soumendu Bhattacharya, A. Chatterjee, 2002, Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002.

An efficient hierarchical fault isolation technique for mixed-signal boards

Abhijit Chatterjee, Sasikumar Cherubal, A. Chatterjee, 2000, VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design.

Fault modeling and fault sampling for isolating faults in analog and mixed-signal circuits

Abhijit Chatterjee, Sudip Chakrabarti, A. Chatterjee, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Compact fault dictionary construction for efficient isolation of faults in analog and mixed-signal circuits

Abhijit Chatterjee, Sudip Chakrabarti, A. Chatterjee, 1999, Proceedings 20th Anniversary Conference on Advanced Research in VLSI.

Parametric fault diagnosis for analog systems using functional mapping

Abhijit Chatterjee, Sasikumar Cherubal, A. Chatterjee, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

Enhancing test effectiveness for analog circuits using synthesized measurements

Abhijit Chatterjee, Pramodchandran N. Variyam, A. Chatterjee, 1998, Proceedings. 16th IEEE VLSI Test Symposium (Cat. No.98TB100231).

Dynamic Test Stimulus Adaptation for Analog/RF Circuits Using Booleanized Models Extracted From Hardware

Abhijit Chatterjee, Sabyasachi Deyati, Barry J. Muldrey, 2020, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Wideband Sparse Signal Acquisition With Dual-rate Time-Interleaved Undersampling Hardware and Multicoset Signal Reconstruction Algorithms

Abhijit Chatterjee, Thomas Moon, Hyun Woo Choi, 2015, IEEE Transactions on Signal Processing.

Analog Sensor Based Testing of Phase-Locked Loop Dynamic Performance Parameters

Abhijit Chatterjee, Xian Wang, Sen-Wen Hsiao, 2013, 2013 22nd Asian Test Symposium.

A programmable BIST design for PLL static phase offset estimation and clock duty cycle detection

Abhijit Chatterjee, Sen-Wen Hsiao, Nicholas Tzou, 2013, 2013 IEEE 31st VLSI Test Symposium (VTS).

Low-Cost Specification Based Testing of RF Amplifier Circuits using Oscillation Principles

Abhijit Chatterjee, Madhavan Swaminathan, Abhilash Goyal, 2010, J. Electron. Test..

Linearity Testing of A/D Converters Using Selective Code Measurement

Abhijit Chatterjee, Shalabh Goyal, A. Chatterjee, 2008, J. Electron. Test..

A Low-Cost Test Methodology for Dynamic Specification Testing of High-Speed Data Converters

Abhijit Chatterjee, Shalabh Goyal, Michael Purtell, 2007, J. Electron. Test..

A DFT Approach for Testing Embedded Systems Using DC Sensors

Abhijit Chatterjee, Soumendu Bhattacharya, A. Chatterjee, 2006, IEEE Design & Test of Computers.

Concurrent RF test using optimized modulated RF stimuli

Abhijit Chatterjee, John McLaughlin, Sasikumar Cherubal, 2004, 17th International Conference on VLSI Design. Proceedings..

Production deployment of a fast transient testing methodology for analog circuits: case study and results

Abhijit Chatterjee, Sasikumar Cherubal, Ramakrishna Voorakaranam, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

A signature test framework for rapid production testing of RF circuits

Abhijit Chatterjee, Sasikumar Cherubal, Ramakrishna Voorakaranam, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Specification-driven test generation for analog circuits

Abhijit Chatterjee, Pramodchandran N. Variyam, A. Chatterjee, 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Hierarchical specification-driven analog fault modeling for efficient fault simulation and diagnosis

R. Voorakaranam, S. Chakrabarti, J. Hou, 1997, Proceedings International Test Conference 1997.

Concurrent error detection and fault-tolerance in linear analog circuits using continuous checksums

Abhijit Chatterjee, A. Chatterjee, 1993, IEEE Trans. Very Large Scale Integr. Syst..

Low-Frequency and Low-Cost Test Methodology for Integrated RF Substrates

Abhijit Chatterjee, Madhavan Swaminathan, Abhilash Goyal, 2010, IEEE Transactions on Advanced Packaging.

Online RF Checkers for Diagnosing Multi-Gigahertz Automatic Test Boards on Low Cost ATE Platforms

Abhijit Chatterjee, Friedrich Taenzler, Ganesh Srinivasan, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Power-performance trade-offs in second level memory used by an ARM-like RISC architecture

Abhijit Chatterjee, Krishna V. Palem, Weng-Fai Wong, 2002 .

Switching activity generation with automated BIST synthesis forperformance testing of interconnects

Abhijit Chatterjee, Yervant Zorian, Rajesh Pendurkar, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Soft-error tolerance analysis and optimization of nanometer circuits

Abhijit Chatterjee, Abdulkadir Utku Diril, Yuvraj Singh Dhillon, 2005, Design, Automation and Test in Europe.

Noise-Resilient SRAM Physically Unclonable Function Design for Security

Abhijit Chatterjee, Sabyasachi Deyati, Adit Singh, 2016, 2016 IEEE 25th Asian Test Symposium (ATS).

An FPGA-based ATE extension module for low-cost multi-GHz memory test

Abhijit Chatterjee, Sungyeol Kim, David C. Keezer, 2015, 2015 20th IEEE European Test Symposium (ETS).

Challenge Engineering and Design of Analog Push Pull Amplifier Based Physically Unclonable Function for Hardware Security

Abhijit Chatterjee, Adit D. Singh, Sabyasachi Deyati, 2015, 2015 IEEE 24th Asian Test Symposium (ATS).

Analysis and optimization of nanometer CMOS circuits for soft-error tolerance

Abhijit Chatterjee, Adit D. Singh, Abdulkadir Utku Diril, 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Fault simulation of linear analog circuits

Abhijit Chatterjee, Jacob A. Abraham, Naveena Nagi, 1993, J. Electron. Test..

Efficient instruction-level optimization methodology for low-power embedded systems

Abhijit Chatterjee, Kyu-won Choi, A. Chatterjee, 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).

Optimal single probe traversal algorithm for testing of MCM substrate

Abhijit Chatterjee, Craig A. Tovey, Rajesh Pendurkar, 1996, Proceedings International Conference on Computer Design. VLSI in Computers and Processors.

Syndrome-based functional delay fault location in linear digital data-flow graphs

Abhijit Chatterjee, Manuel A. d'Abreu, M. d'Abreu, 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.

VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests

Abhijit Chatterjee, Sabyasachi Deyati, Aritra Banerjee, 2013, 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems.

Phase Distortion to Amplitude Conversion-Based Low-Cost Measurement of AM-AM and AM-PM Effects in RF Power Amplifiers

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

BIST/Digital-Compatible Testing of RF Devices Using Distortion Model Fitting

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2012, J. Electron. Test..

Low cost AM/AM and AM/PM distortion measurement using distortion-to-amplitude transformations

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2009, 2009 International Test Conference.

Low cost parametric failure diagnosis of RF transceivers

Abhijit Chatterjee, Donghoon Han, Shalabh Goyal, 2006, Eleventh IEEE European Test Symposium (ETS'06).

Fast specification test of TDMA power amplifiers using transient current measurements

Abhijit Chatterjee, S. Cherubal, S. Bhattacharya, 2005 .

Alternate Testing of RF Transceivers Using Optimized Test Stimulus for Accurate Prediction of System Specifications

Abhijit Chatterjee, Achintya Halder, Soumendu Bhattacharya, 2005, J. Electron. Test..

A unified approach for fault simulation of linear mixed-signal circuits

Abhijit Chatterjee, Jacob A. Abraham, Hong Zheng, 1996, J. Electron. Test..

A Noise Aware CML Latch Modelling for Large System Simulation

Abhijit Chatterjee, Debesh Bhatta, Suvadeep Banerjee, 2015, 2015 28th International Conference on VLSI Design.

Test generation, design-for-testability and built-in self-test for arithmetic units based on graph labeling

Abhijit Chatterjee, Jacob A. Abraham, J. Abraham, 1991, J. Electron. Test..

Checksum-Based Probabilistic Transient-Error Compensation for Linear Digital Systems

Abhijit Chatterjee, Maryam Ashouei, A. Chatterjee, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Adaptive Signal Scaling Driven Critical Path Modulation for Low Power Baseband OFDM Processors

Abhijit Chatterjee, M. M. Nisar, Muhammad Mudassar Nisar, 2008, 21st International Conference on VLSI Design (VLSID 2008).

Design of soft error resilient linear digital filters using checksum-based probabilistic error correction

Abhijit Chatterjee, Maryam Ashouei, Soumendu Bhattacharya, 2006, 24th IEEE VLSI Test Symposium.

Concurrent Error Detection in Nonlinear Digital Circuits Using Time-Freeze Linearization

Abhijit Chatterjee, Rabindra K. Roy, R. Roy, 1997, IEEE Trans. Computers.

Design for diagnosability of linear digital filters using time-space expansion

Abhijit Chatterjee, Rabindra K. Roy, R. Roy, 1994, Proceedings of IEEE VLSI Test Symposium.

Greedy hardware optimization for linear digital circuits using number splitting and refactorization

Abhijit Chatterjee, Rabindra K. Roy, Manuel A. d'Abreu, 1993, IEEE Trans. Very Large Scale Integr. Syst..

Concurrent error detection in nonlinear digital circuits with applications to adaptive filters

Abhijit Chatterjee, Rabindra K. Roy, R. Roy, 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

The Design of Fault-Tolerant Linear Digital State Variable Systems: Theory and Techniques

Abhijit Chatterjee, Manuel A. d'Abreu, M. d'Abreu, 1993, IEEE Trans. Computers.

An Architectural Transformation Program for Optimization of Digital Systems by Multi-Level Decomposition

Abhijit Chatterjee, Rabindra K. Roy, R. Roy, 1993, 30th ACM/IEEE Design Automation Conference.

Automatic test generation for linear digital systems with bi-level search using matrix transform methods

R. K. Roy, J. A. Abraham, J. H. Patel, 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

Concurrent error detection and fault-tolerance in linear digital state variable systems

Abhijit Chatterjee, Manuel A. d'Abreu, M. d'Abreu, 1991, [1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium.

Robust low-power signal processing and communication algorithms

Abhijit Chatterjee, M. M. Nisar, A. Chatterjee, 2010 .

DSP assisted low cost IQ mismatch measurement and compensation using built in power detector

Abhijit Chatterjee, Shyam Kumar Devarakond, Shreyas Sen, 2010, 2010 IEEE MTT-S International Microwave Symposium.

Device aging: A reliability and security concern

Abhijit Chatterjee, Francky Catthoor, Adit D. Singh, 2018, 2018 IEEE 23rd European Test Symposium (ETS).

ALERA: Accelerated Reinforcement Learning Driven Adaptation to Electro-Mechanical Degradation in Nonlinear Control Systems Using Encoded State Space Error Signatures

Abhijit Chatterjee, Suvadeep Banerjee, A. Chatterjee, 2019, ACM Trans. Intell. Syst. Technol..

Secure Control Loop Execution of Cyber-Physical Devices Using Predictive State Space Checks

A. Chatterjee, Kwondo Ma, C. Amarnath, 2023, 2023 24th International Symposium on Quality Electronic Design (ISQED).

Online Fast Detection and Diagnosis of Power Grid Security Attacks Using State Checksums

Abhijit Chatterjee, Suvadeep Banerjee, A. Chatterjee, 2021, 2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Barrier Functions in Cascaded Controller: Safe Quadrotor Control

Abhijit Chatterjee, Munzir Zafar, Mouhyemen Khan, 2019, 2020 American Control Conference (ACC).

Real-time use-aware adaptive MIMO RF receiver systems for energy efficiency under BER constraints

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

A Power-Scalable Channel-Adaptive Wireless Receiver Based on Built-In Orthogonally Tunable LNA

Abhijit Chatterjee, Marian Verhelst, Shreyas Sen, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Environment-Adaptive Concurrent Companding and Bias Control for Efficient Power-Amplifier Operation

Abhijit Chatterjee, Shreyas Sen, Rajarajan Senguttuvan, 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

Pro-VIZOR: Process tunable virtually zero margin low power adaptive RF for wireless systems

Abhijit Chatterjee, Vishwanath Natarajan, Shreyas Sen, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Self-Learning RF Receiver Systems: Process Aware Real-Time Adaptation to Channel Conditions for Low Power Operation

Abhijit Chatterjee, Shreyas Sen, Debashis Banerjee, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

Cross-Layer Control Adaptation for Autonomous System Resilience

Abhijit Chatterjee, Jacob A. Abraham, Suvadeep Banerjee, 2018, 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS).

Content-Aware Low-Complexity Object Detection for Tracking Using Adaptive Compressed Sensing

Abhijit Chatterjee, Joshua W. Wells, A. Chatterjee, 2018, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Low Cost Sparse Multiband Signal Characterization Using Asynchronous Multi-Rate Sampling: Algorithms and Hardware

A. Chatterjee, B. Muldrey, N. Tzou, 2015, J. Electron. Test..

Low-cost wideband periodic signal reconstruction using incoherent undersampling and back-end cost optimization

Abhijit Chatterjee, Debesh Bhatta, Hyun Woo Choi, 2012, 2012 IEEE International Test Conference.

Test time reduction of successive approximation register A/D converter by selective code measurement

Abhijit Chatterjee, Shalabh Goyal, Hosam Haggag, 2005, IEEE International Conference on Test, 2005..

Concurrent Device/Specification Cause–Effect Monitoring for Yield Diagnosis Using Alternate Diagnostic Signatures

Abhijit Chatterjee, Shreyas Sen, Shyam Kumar Devarakond, 2012, IEEE Design & Test of Computers.

Design for testability and built-in self-test of mixed-signal circuits: a tutorial

Abhijit Chatterjee, Naveena Nagi, A. Chatterjee, 1997, Proceedings Tenth International Conference on VLSI Design.

Soft Error Resilient Deep Learning Systems Using Neuron Gradient Statistics

Mohamed Mejri, A. Chatterjee, Kwondo Ma, 2022, IEEE International Symposium on On-Line Testing and Robust System Design.

A Novel Approach to Error Resilience in Online Reinforcement Learning

A. Chatterjee, C. Amarnath, 2023, 2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Error Resilient Transformers: A Novel Soft Error Vulnerability Guided Approach to Error Checking and Suppression

A. Chatterjee, Kwondo Ma, C. Amarnath, 2023, 2023 IEEE European Test Symposium (ETS).

Error Resilient Neuromorphic Systems Using Embedded Predictive Neuron Checks

A. Chatterjee, C. Amarnath, 2023, 2023 IEEE 24th Latin American Test Symposium (LATS).

Addressing Soft Error and Security Threats in DNNs Using Learning Driven Algorithmic Checks

Md Imran Momtaz, A. Chatterjee, C. Amarnath, 2021, 2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Error Resilient Neuromorphic Networks Using Checker Neurons

Abhijit Chatterjee, Suvadeep Banerjee, Sujay Pandey, 2018, 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS).

ReiNN: Efficient error resilience in artificial neural networks using encoded consistency checks

Abhijit Chatterjee, Suvadeep Banerjee, Sujay Pandey, 2018, 2018 IEEE 23rd European Test Symposium (ETS).

Concurrent transient fault simulation for analog circuits

Abhijit Chatterjee, Junwei Hou, A. Chatterjee, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Fault-based automatic test generator for linear analog circuits

Abhijit Chatterjee, Jacob A. Abraham, Ashok Balivada, 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

Hierarchical State Space Checks for Errors in Sensors, Actuators and Control of Nonlinear Systems: Diagnosis and Compensation

Abhijit Chatterjee, Md Imran Momtaz, A. Chatterjee, 2019, 2019 IEEE 28th Asian Test Symposium (ATS).

Accurate Linear Model for SET Critical Charge Estimation

Abhijit Chatterjee, Cecilia Metra, Martin Omaña, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Checksum-based concurrent error detection in linear analog systems with second and higher order stages

Abhijit Chatterjee, A. Chatterjee, 1992, Digest of Papers. 1992 IEEE VLSI Test Symposium.

ALERA

A. Chatterjee, Suvadeep Banerjee, 2019, ACM Transactions on Intelligent Systems and Technology.

Real-time self-learning for control law adaptation in nonlinear systems using encoded check states

Abhijit Chatterjee, Suvadeep Banerjee, A. Chatterjee, 2017, 2017 22nd IEEE European Test Symposium (ETS).

Diagnosis and Compensation of Control Program, Sensor and Actuator Failures in Nonlinear Systems Using Hierarchical State Space Checks

Abhijit Chatterjee, Md Imran Momtaz, A. Chatterjee, 2020, Journal of Electronic Testing.

Concurrent Error Detection in Embedded Digital Control of Nonlinear Autonomous Systems Using Adaptive State Space Checks

Abhijit Chatterjee, Md Imran Momtaz, Chandramouli N Amarnath, 2020, 2020 IEEE International Test Conference (ITC).

Partial Reset Methodology and Experiments for Improving Random-Pattern Testability and BIST of Sequential Circuits

Abhijit Chatterjee, Rabindra K. Roy, Huy Nguyen, 1999, J. Electron. Test..

Impact of partial reset on fault independent testing and BIST

Abhijit Chatterjee, Rabindra K. Roy, Huy Nguyen, 1997, Proceedings Tenth International Conference on VLSI Design.

A rapid-prototyping environment for digital-signal processors

Abhijit Chatterjee, Richard I. Hartley, Michael J. Hartman, 1991, IEEE Design & Test of Computers.

Modular fault simulation of mixed signal circuits with fault ranking by severity

Abhijit Chatterjee, Alfred V. Gomes, Ramakrishna Voorakaranam, 1998, Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223).

Test Enabled Process Tuning for Adaptive Baseband OFDM Processor

Abhijit Chatterjee, Muhammad Mudassar Nisar, A. Chatterjee, 2008, 26th IEEE VLSI Test Symposium (vts 2008).

Package Electrical Testing

Abhijit Chatterjee, Madhavan Swaminathan, K. Sasidhar, 1997 .

A submicron MOSFET model for simulation of analog circuits

Abhijit Chatterjee, Ping Yang, Charles F. Machala, 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

Low-cost test of embedded RF/analog/mixed-signal circuits in SOPs

A. Chatterjee, S.S. Akbay, A. Halder, 2004, IEEE Transactions on Advanced Packaging.

Adaptive response surface modeling-based method for analog circuit sizing

Abhijit Chatterjee, Donghoon Han, A. Chatterjee, 2004, IEEE International SOC Conference, 2004. Proceedings..