Alan J. Coppola

OpenFPGA CoreLib core library interoperability effort

Georgi Kuzmanov, Michael J. Wirthlin, Walid A. Najjar, 2008, Parallel Comput..

Board-level multiterminal net assignment for the partial cross-bar architecture

Andrew A. Kennings, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, 2003, IEEE Trans. Very Large Scale Integr. Syst..

An Implementation of a State Assignment Heuristic

Alan J. Coppola, A. Coppola, 1986, 23rd ACM/IEEE Design Automation Conference.

Tokenized State Machine Model for Synthesis of Sequential Circuits into EPLDs and FPGAs

Marek A. Perkowski, Robert Anderson, Edmund Pierzchala, 1992, Synthesis for Control Dominated Circuits.

An Implementation of a State Assignment Heuristic

Alan J. Coppola, 1986, DAC 1986.

An Exact Solution to the Fitting Problem in the Application Specific State Machine Device

Malgorzata Chrzanowska-Jeske, Marek A. Perkowski, Edmund Pierzchala, 1994, J. Circuits Syst. Comput..

Regular realization of symmetric functions using reversible logic

Lech Józwiak, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, 2001, Proceedings Euromicro Symposium on Digital Systems Design.

Board-level multiterminal net assignment

Andrew A. Kennings, Alan Mishchenko, Malgorzata Chrzanowska-Jeske, 2002, GLSVLSI '02.

On segmented channel routability

Xiaoyu Song, Andrew A. Kennings, William N. N. Hung, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

New Methods in the Analysis of Logic Minimization Data and Algorithms

Alan J. Coppola, A. Coppola, 1989, 26th ACM/IEEE Design Automation Conference.

Segmented channel routability via satisfiability

Xiaoyu Song, Andrew A. Kennings, William N. N. Hung, 2004, TODE.